coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-10-13	src: Rename EM100Pro-specific SPI console Kconfig option	Angel Pons
2020-10-02	drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES config	Shelley Chen
2020-09-26	arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`	Angel Pons
2020-09-21	src/soc/intel: Drop unneeded empty lines	Elyes HAOUAS
2020-09-08	soc/intel/baytrail: Add missing GSM size definitions	Angel Pons
2020-08-24	mrc_cache: Add mrc_cache fetch functions to support non-x86 platforms	Shelley Chen
2020-08-21	SMM: Validate more user-provided pointers	Patrick Rudolph
2020-08-18	elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE	Aaron Durbin
2020-08-18	src: Remove unused 'include <stddef.h>	Elyes HAOUAS
2020-08-05	{sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out code	Angel Pons
2020-08-04	soc/intel/baytrail: Factor out `acpi_fill_madt()`	Angel Pons
2020-08-03	soc/intel/baytrail: Add MRC SMBus workaround	Mate Kukri
2020-08-02	soc/intel/baytrail/northcluster.c: Clean up comments	Angel Pons
2020-08-02	soc/intel/baytrail/sata.c: Fix SATA init sequence	Angel Pons
2020-08-02	soc/intel/baytrail: Add native refcode replacement	Mate Kukri
2020-08-02	soc/intel/baytrail/northcluster.c: Rename variable	Angel Pons
2020-08-02	soc/intel/baytrail/northcluster.c: Tidy up long lines	Angel Pons
2020-07-26	src: Remove whitespace between 'sizeof' and '('	Elyes HAOUAS
2020-07-26	{sb,soc}/intel/*/.c: Use macros for PCI COMMAND bits	Angel Pons
2020-07-26	cpu,soc/intel: Drop select SMP	Kyösti Mälkki
2020-07-25	soc/intel/baytrail/southcluster.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/include/soc/irq.h: Add braces	Angel Pons
2020-07-25	soc/intel/baytrail: Simplify pattrs definitions	Angel Pons
2020-07-25	soc/intel/baytrail/smm.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/smihandler.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/cpu.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/sd.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/lpss.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/lpe.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/{baytrail,braswell}: Drop unneeded `return`	Angel Pons
2020-07-25	soc/intel/baytrail/iosf.c: Add missing braces	Angel Pons
2020-07-25	soc/intel/baytrail/elog.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/cpu.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/acpi.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/bootblock/bootblock.c: Move functions	Angel Pons
2020-07-25	soc/intel/baytrail: Retype some pointers	Angel Pons
2020-07-21	src: Use ACPI macros	Elyes HAOUAS
2020-07-21	soc/intel/baytrail: Add new CPUID 0x30679	Mate Kukri
2020-07-20	src: Report word-sized access for PM1a_EVT	Angel Pons
2020-07-20	src: Make HAVE_CF9_RESET set the FADT reset register	Angel Pons
2020-07-20	src: Drop useless cache flush settings in FADT	Angel Pons
2020-07-20	src: Never overwrite `fadt->flags`	Angel Pons
2020-07-20	src: Drop useless PM1b settings from FADT	Angel Pons
2020-07-20	src: Drop useless GPE1 settings from FADT	Angel Pons
2020-07-14	soc/intel/baytrail: Move `acpi_fill_fadt` to fadt.c	Angel Pons
2020-07-14	src: Drop unused <cpu/x86/tsc.h> include	Elyes HAOUAS
2020-07-14	soc/intel/baytrail/northcluster.c: Add missing include	Elyes HAOUAS
2020-07-14	soc/intel/baytrail/romstage/pmc.c: Add missing include	Elyes HAOUAS
2020-07-14	soc/intel/baytrail/romstage/raminit.c: Add missing include	Elyes HAOUAS
2020-07-14	src: Remove unused 'include <stdint.h>	Elyes HAOUAS