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path: root/src/soc/intel/baytrail
AgeCommit message (Expand)Author
2015-07-07x86: Drop -Wa,--divideStefan Reinauer
2015-07-02Move baytrail & fsp_baytrail to the common IFD interface.Martin Roth
2015-06-24Kconfig: Get rid of obsolete symbolsMartin Roth
2015-06-23Kconfig: Move CBFS_SIZE into Mainboard menuMartin Roth
2015-06-09stage_cache: use cbmem init hooksAaron Durbin
2015-06-09cbmem: add indicator to hooks if cbmem is being recoveredAaron Durbin
2015-06-09cbmem: Unify CBMEM init tasks with CBMEM_INIT_HOOK() APIKyösti Mälkki
2015-06-08Remove empty lines at end of fileElyes HAOUAS
2015-06-05device_ops: add device_t argument to acpi_fill_ssdt_generatorAlexander Couzens
2015-06-05device_ops: add device_t argument to acpi_inject_dsdt_generatorAlexander Couzens
2015-06-04devicetree: Change scan_bus() prototype in device opsKyösti Mälkki
2015-06-04devicetree: Discriminate device ops scan_bus()Kyösti Mälkki
2015-06-02assets: abstract away the firmware assets used for bootingAaron Durbin
2015-06-02cbfs: new API and better program loadingAaron Durbin
2015-05-29chromeos: always enable timestampsStefan Reinauer
2015-05-28smm: Merge configs SMM_MODULES and SMM_TSEGVladimir Serbinenko
2015-05-27Move TPM code out of chromeosVladimir Serbinenko
2015-05-26acpi: Remove monolithic ACPIVladimir Serbinenko
2015-05-23baytrail: Switch to per-device ACPIVladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-13baytrail: broadwell: correct refcode loadingAaron Durbin
2015-05-053rdparty: move to 3rdparty/blobsPatrick Georgi
2015-05-053rdparty: Move to blobsPatrick Georgi
2015-05-01intel: Correct MMIO related ACPI table settingsDave Frodin
2015-04-30kbuild: Don't require intel/common changes for every socStefan Reinauer
2015-04-29kbuild: automatically include SOCsStefan Reinauer
2015-04-22coreboot: common stage cacheAaron Durbin
2015-04-15soc/baytrail: Use microcode from the blobs repositoryMarc Jones
2015-04-10baytrail: correct NC pin to GPO pin according to BYT platform design guideKane Chen
2015-04-10baytrail: add code for supporting 2x ddr refresh rateKane Chen
2015-04-10baytrail: fix the coding error on PCIe L1 exit latencyKevin L Lee
2015-04-10Baytrail: Prior to PCI scan, wait for LCTL to be active in 50 msKevin Hsieh
2015-04-10baytrail: Switch from ACPI mode to PCI mode for legacy supportMarc Jones
2015-04-07baytrail: Change all SoC headers to <soc/headername.h> systemJulius Werner
2015-04-06baytrail: Fix hdmi audio choppy issueKein Yuan
2015-04-06baytrail: reinitialize spi controller in SMM finalizationAaron Durbin
2015-04-04Baytrail: Fix no_dev_behind_port not executed for RP1/2/3.Kenji Chen
2015-04-03rmodule: use struct prog while loading rmodulesAaron Durbin
2015-04-02baytrail: Change USB3 PLL VCO and iCLK PLL current on BYT-M/D CPUKein Yuan
2015-04-02Baytrail: Change PCIe root disable algorithmKenji Chen
2015-04-02Baytrail: add _PRT to each PCIe root port deviceTed Kuo
2015-04-01cbfs: correct types used for accessing filesAaron Durbin
2015-03-30baytrail: fix HAVE_REFCODE_BLOB build errorsAaron Durbin
2015-03-30Update hex values to CBFS binary name types in MakefilesMartin Roth
2015-03-18bootstate: use structure pointers for scheduling callbacksAaron Durbin
2015-03-10ACPI: Get S3 resume state from romstage_handoffKyösti Mälkki
2015-03-09coreboot: fix munged license textAaron Durbin
2015-02-25soc/intel/baytrail/Kconfig: Remove explicit `HAVE_MONOTONIC_TIMER`Paul Menzel
2015-02-16acpi: Generate valid ACPI processor objectsTimothy Pearson
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
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