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path: root/src/soc/intel/braswell/cpu.c
AgeCommit message (Expand)Author
2019-03-04src/soc/intel/braswell/cpu.c: Set up local APICFrans Hendriks
2018-12-20cpu/intel/common: decouple IA32_FEATURE_CONTROL lock from set_vmx()Matt DeVillier
2018-11-16soc/intel/braswell: add vmx support via CPU_INTEL_COMMONMatt DeVillier
2018-10-23src: Remove unneeded whitespaceElyes HAOUAS
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-05src: Fix MSR_PKG_CST_CONFIG_CONTROL register nameElyes HAOUAS
2018-07-24cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSxArthur Heymans
2018-06-04soc/intel/braswell: Get rid of device_tElyes HAOUAS
2017-11-23Constify struct cpu_device_id instancesJonathan Neuschäfer
2017-09-11cpu/x86/mp_init: remove adjust_cpu_apic_entry()Aaron Durbin
2017-03-17soc/intel/braswell: Fix most of the issues detected by checkpatchLee Leahy
2016-05-06soc/intel/braswell: convert to using common MP and SMM initAaron Durbin
2016-05-02cpu/x86/mp_init: remove unused callback argumentsAaron Durbin
2016-03-08x86 chipsets: utilize x86_setup_mtrrs_with_detect()Aaron Durbin
2016-01-14soc/braswell: Add CPUID for D0 steppingDivya Sasidharan
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-27FSP 1.1: Move common FSP codeLee Leahy
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-08-29intel/braswell: allow dirty cache line evictions for SMRAM to stickChiranjeevi Rapolu
2015-07-06Braswell: Update to end of June.Lee Leahy
2015-06-25Braswell: Add Braswell SOC supportLee Leahy
2015-05-28Remove address from GPLv2 headersPatrick Georgi
2015-05-23Braswell: Use Baytrail as Comparison BaseLee Leahy