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path: root/src/soc/intel/braswell/include
AgeCommit message (Expand)Author
2016-01-28soc/braswell: Add interface to program USB2_COMPBG registershkim
2016-01-28soc/braswell: Fix DSP clockfdurairx
2016-01-28drivers/intel/fsp1_1: Remove extra include referencesLee Leahy
2016-01-27soc/braswell: Fix leakage on V1P8S railShobhit Srivastava
2016-01-27soc/braswell: Add macro NATIVE_INT_PU20KHannah Williams
2016-01-26Braswell: Implement Gpio library functions to read RAMIDSubrata Banik
2016-01-22soc/braswell: Add method for Wifi regulatory domainFelix Durairaj
2016-01-14soc/braswell: Fix P-state tableSubrata Banik
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-27FSP 1.1: Move common FSP codeLee Leahy
2015-10-11soc/intel/common: remove chipset specific callsAaron Durbin
2015-09-17braswell: Switch to using common ACPI _SWS codeDuncan Laurie
2015-09-10fsp1_1: provide binding to UEFI versionAaron Durbin
2015-09-08braswell: Tristate CFIO 139 and CFIO 140Ravi Sarawadi
2015-08-29intel/braswell: allow dirty cache line evictions for SMRAM to stickChiranjeevi Rapolu
2015-07-08Braswell: Fix error in the warranty statementLee Leahy
2015-07-06Braswell: Update to end of June.Lee Leahy
2015-07-06Braswell: Update the ACPI tablesLee Leahy
2015-06-25Braswell: Remove copyright addressLee Leahy
2015-06-25Braswell: Add Braswell SOC supportLee Leahy
2015-05-28Remove address from GPLv2 headersPatrick Georgi
2015-05-23Braswell: Use Baytrail as Comparison BaseLee Leahy
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