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path: root/src/soc/intel/braswell
AgeCommit message (Expand)Author
2016-08-19Kconfig: introduce writable boot device notionAaron Durbin
2016-08-10Makefiles: Use $(MAINBOARD_DIR) instead of $(CONFIG_MAINBOARD_DIR)Martin Roth
2016-08-08chromeos chipsets: select RTC usageAaron Durbin
2016-07-31src/soc: Capitalize CPU, ACPI, RAM and ROMElyes HAOUAS
2016-07-31Remove extra newlines from the end of all coreboot files.Martin Roth
2016-07-30chromeos mainboards: remove chromeos.aslAaron Durbin
2016-07-15soc/intel/braswell: use common Intel ACPI hardware definitionsAaron Durbin
2016-07-15soc/intel/braswell: don't duplicate setting ACPI sleep stateAaron Durbin
2016-05-06soc/intel: indicate to build system that XIP_ROM_SIZE isn't usedAaron Durbin
2016-05-06{cpu,soc}/intel: remove unused smm_init() functionAaron Durbin
2016-05-06soc/intel/braswell: convert to using common MP and SMM initAaron Durbin
2016-05-04cpu/x86: remove BACKUP_DEFAULT_SMM_REGION optionAaron Durbin
2016-05-02cpu/x86/mp_init: remove unused callback argumentsAaron Durbin
2016-04-30lib/reg_script: Allow multiple independent handlersLee Leahy
2016-04-14soc/intel: Update license headersMartin Roth
2016-03-08x86 chipsets: utilize x86_setup_mtrrs_with_detect()Aaron Durbin
2016-02-12timestamp: Remove HAS_PRECBMEM_TIMESTAMP_REGION KconfigJulius Werner
2016-01-31drivers/intel/fsp1_1: Fix spelling error in API and copyrightLee Leahy
2016-01-29soc/braswell: Fix Global NVS base addressHannah Williams
2016-01-29src/: Chmod 644 all .c, .h, .asl, .inc, .cb, .hex, & Kconfig filesMartin Roth
2016-01-28soc/braswell: Add interface to program USB2_COMPBG registershkim
2016-01-28soc/braswell/acpi/DPTF: Write TCHG state on AC connect.Jenny TC
2016-01-28soc/braswell/acpi: Fix CID1 offset in commentHannah Williams
2016-01-28soc/braswell: Fix issues found during static code analysisRavi Sarawadi
2016-01-28Braswell: Separate L1 Sub State init procedure for boards.Kenji Chen
2016-01-28Strago: Enable CA MirrorShobhit Srivastava
2016-01-28soc/braswell: Disable SD card detect simulation in FSPDivya Sasidharan
2016-01-28soc/braswell: Set max frequency to be turbo frequencyHannah Williams
2016-01-28soc/braswell: Fix DSP clockfdurairx
2016-01-28drivers/intel/fsp1_1: Remove extra include referencesLee Leahy
2016-01-27soc/braswell: Fix leakage on V1P8S railShobhit Srivastava
2016-01-27soc/braswell: Add macro NATIVE_INT_PU20KHannah Williams
2016-01-26Braswell: Implement Gpio library functions to read RAMIDSubrata Banik
2016-01-22soc/braswell: Add method for Wifi regulatory domainFelix Durairaj
2016-01-19Braswell: add code to support customization of I2C data hold timeKane Chen
2016-01-19soc/braswell: Remove the unneccessary functions from pcie.cShaunak Saha
2016-01-14soc/braswell: Add CPUID for D0 steppingDivya Sasidharan
2016-01-14soc/braswell: Fix P-state tableSubrata Banik
2016-01-07intel/braswell: Disable IFD & ME by default so abuild can buildMartin Roth
2016-01-07Correct some common spelling mistakesMartin Roth
2016-01-06intel/braswell: Build in both C0 and 'other' vbiosMartin Roth
2015-12-15x86 acpi: remove ALIGN_CURRENT macroAaron Durbin
2015-12-10ACPI: Fix IASL Warning about unused method for GBUF checkMartin Roth
2015-12-04braswell/skylake: Add FspUpdVpd.h to fix compilationStefan Reinauer
2015-11-24soc/intel/braswell: Drop gfx_read_resources()Nico Huber
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-27FSP1_1: Always use common codeLee Leahy
2015-10-27FSP 1.1: Replace soc_ prefix with fsp_Lee Leahy
2015-10-27FSP 1.1: Move common FSP codeLee Leahy
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc