coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2016-08-10	Makefiles: Use $(MAINBOARD_DIR) instead of $(CONFIG_MAINBOARD_DIR)	Martin Roth
2016-08-08	chromeos chipsets: select RTC usage	Aaron Durbin
2016-07-31	src/soc: Capitalize CPU, ACPI, RAM and ROM	Elyes HAOUAS
2016-07-31	Remove extra newlines from the end of all coreboot files.	Martin Roth
2016-07-30	chromeos mainboards: remove chromeos.asl	Aaron Durbin
2016-07-15	soc/intel/braswell: use common Intel ACPI hardware definitions	Aaron Durbin
2016-07-15	soc/intel/braswell: don't duplicate setting ACPI sleep state	Aaron Durbin
2016-05-06	soc/intel: indicate to build system that XIP_ROM_SIZE isn't used	Aaron Durbin
2016-05-06	{cpu,soc}/intel: remove unused smm_init() function	Aaron Durbin
2016-05-06	soc/intel/braswell: convert to using common MP and SMM init	Aaron Durbin
2016-05-04	cpu/x86: remove BACKUP_DEFAULT_SMM_REGION option	Aaron Durbin
2016-05-02	cpu/x86/mp_init: remove unused callback arguments	Aaron Durbin
2016-04-30	lib/reg_script: Allow multiple independent handlers	Lee Leahy
2016-04-14	soc/intel: Update license headers	Martin Roth
2016-03-08	x86 chipsets: utilize x86_setup_mtrrs_with_detect()	Aaron Durbin
2016-02-12	timestamp: Remove HAS_PRECBMEM_TIMESTAMP_REGION Kconfig	Julius Werner
2016-01-31	drivers/intel/fsp1_1: Fix spelling error in API and copyright	Lee Leahy
2016-01-29	soc/braswell: Fix Global NVS base address	Hannah Williams
2016-01-29	src/: Chmod 644 all .c, .h, .asl, .inc, .cb, .hex, & Kconfig files	Martin Roth
2016-01-28	soc/braswell: Add interface to program USB2_COMPBG register	shkim
2016-01-28	soc/braswell/acpi/DPTF: Write TCHG state on AC connect.	Jenny TC
2016-01-28	soc/braswell/acpi: Fix CID1 offset in comment	Hannah Williams
2016-01-28	soc/braswell: Fix issues found during static code analysis	Ravi Sarawadi
2016-01-28	Braswell: Separate L1 Sub State init procedure for boards.	Kenji Chen
2016-01-28	Strago: Enable CA Mirror	Shobhit Srivastava
2016-01-28	soc/braswell: Disable SD card detect simulation in FSP	Divya Sasidharan
2016-01-28	soc/braswell: Set max frequency to be turbo frequency	Hannah Williams
2016-01-28	soc/braswell: Fix DSP clock	fdurairx
2016-01-28	drivers/intel/fsp1_1: Remove extra include references	Lee Leahy
2016-01-27	soc/braswell: Fix leakage on V1P8S rail	Shobhit Srivastava
2016-01-27	soc/braswell: Add macro NATIVE_INT_PU20K	Hannah Williams
2016-01-26	Braswell: Implement Gpio library functions to read RAMID	Subrata Banik
2016-01-22	soc/braswell: Add method for Wifi regulatory domain	Felix Durairaj
2016-01-19	Braswell: add code to support customization of I2C data hold time	Kane Chen
2016-01-19	soc/braswell: Remove the unneccessary functions from pcie.c	Shaunak Saha
2016-01-14	soc/braswell: Add CPUID for D0 stepping	Divya Sasidharan
2016-01-14	soc/braswell: Fix P-state table	Subrata Banik
2016-01-07	intel/braswell: Disable IFD & ME by default so abuild can build	Martin Roth
2016-01-07	Correct some common spelling mistakes	Martin Roth
2016-01-06	intel/braswell: Build in both C0 and 'other' vbios	Martin Roth
2015-12-15	x86 acpi: remove ALIGN_CURRENT macro	Aaron Durbin
2015-12-10	ACPI: Fix IASL Warning about unused method for GBUF check	Martin Roth
2015-12-04	braswell/skylake: Add FspUpdVpd.h to fix compilation	Stefan Reinauer
2015-11-24	soc/intel/braswell: Drop gfx_read_resources()	Nico Huber
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-27	FSP1_1: Always use common code	Lee Leahy
2015-10-27	FSP 1.1: Replace soc_ prefix with fsp_	Lee Leahy
2015-10-27	FSP 1.1: Move common FSP code	Lee Leahy
2015-10-15	cpu/mtrr.h: Fix macro names for MTRR registers	Alexandru Gagniuc
2015-10-11	intel fsp1_1: prepare for romstage vboot verification split	Aaron Durbin