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path: root/src/soc/intel/braswell
AgeCommit message (Expand)Author
2016-03-08x86 chipsets: utilize x86_setup_mtrrs_with_detect()Aaron Durbin
2016-02-12timestamp: Remove HAS_PRECBMEM_TIMESTAMP_REGION KconfigJulius Werner
2016-01-31drivers/intel/fsp1_1: Fix spelling error in API and copyrightLee Leahy
2016-01-29soc/braswell: Fix Global NVS base addressHannah Williams
2016-01-29src/: Chmod 644 all .c, .h, .asl, .inc, .cb, .hex, & Kconfig filesMartin Roth
2016-01-28soc/braswell: Add interface to program USB2_COMPBG registershkim
2016-01-28soc/braswell/acpi/DPTF: Write TCHG state on AC connect.Jenny TC
2016-01-28soc/braswell/acpi: Fix CID1 offset in commentHannah Williams
2016-01-28soc/braswell: Fix issues found during static code analysisRavi Sarawadi
2016-01-28Braswell: Separate L1 Sub State init procedure for boards.Kenji Chen
2016-01-28Strago: Enable CA MirrorShobhit Srivastava
2016-01-28soc/braswell: Disable SD card detect simulation in FSPDivya Sasidharan
2016-01-28soc/braswell: Set max frequency to be turbo frequencyHannah Williams
2016-01-28soc/braswell: Fix DSP clockfdurairx
2016-01-28drivers/intel/fsp1_1: Remove extra include referencesLee Leahy
2016-01-27soc/braswell: Fix leakage on V1P8S railShobhit Srivastava
2016-01-27soc/braswell: Add macro NATIVE_INT_PU20KHannah Williams
2016-01-26Braswell: Implement Gpio library functions to read RAMIDSubrata Banik
2016-01-22soc/braswell: Add method for Wifi regulatory domainFelix Durairaj
2016-01-19Braswell: add code to support customization of I2C data hold timeKane Chen
2016-01-19soc/braswell: Remove the unneccessary functions from pcie.cShaunak Saha
2016-01-14soc/braswell: Add CPUID for D0 steppingDivya Sasidharan
2016-01-14soc/braswell: Fix P-state tableSubrata Banik
2016-01-07intel/braswell: Disable IFD & ME by default so abuild can buildMartin Roth
2016-01-07Correct some common spelling mistakesMartin Roth
2016-01-06intel/braswell: Build in both C0 and 'other' vbiosMartin Roth
2015-12-15x86 acpi: remove ALIGN_CURRENT macroAaron Durbin
2015-12-10ACPI: Fix IASL Warning about unused method for GBUF checkMartin Roth
2015-12-04braswell/skylake: Add FspUpdVpd.h to fix compilationStefan Reinauer
2015-11-24soc/intel/braswell: Drop gfx_read_resources()Nico Huber
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-27FSP1_1: Always use common codeLee Leahy
2015-10-27FSP 1.1: Replace soc_ prefix with fsp_Lee Leahy
2015-10-27FSP 1.1: Move common FSP codeLee Leahy
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-10-11intel fsp1_1: prepare for romstage vboot verification splitAaron Durbin
2015-10-11soc/intel/common: remove chipset specific callsAaron Durbin
2015-10-11intel SOC common: Remove unused parametersLee Leahy
2015-10-11Braswell: Modify CB to accomodate new FSPv83Subrata Banik
2015-10-05Add EM100 'hyper term' spi console support in ramstage & smmMartin Roth
2015-09-30cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc
2015-09-29intel: auto include intel/common/firmwareAaron Durbin
2015-09-17braswell: Switch to using common ACPI _SWS codeDuncan Laurie
2015-09-16Move final Intel chipsets with ME to intel/common/firmwareMartin Roth
2015-09-10fsp1_1: provide binding to UEFI versionAaron Durbin
2015-09-09braswell: acpi: Allow DPTF thresholds to be defined at board-levelShawn Nematbakhsh
2015-09-09x86: bootblock: remove linking and program flow from build systemAaron Durbin
2015-09-08braswell: Tristate CFIO 139 and CFIO 140Ravi Sarawadi
2015-09-07microcode: Unify rules to add microcode to CBFS once againAlexandru Gagniuc
2015-09-07Drop "See file CREDITS..." commentStefan Reinauer
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