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Some coreboot project code with my work
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Kconfig
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Commit message (
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Author
2019-11-26
sb/intel/common/spi: Add Baytrail/Braswell support
Arthur Heymans
2019-11-25
Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol
Arthur Heymans
2019-11-10
soc/intel/broadwell: Use common INTEL_SB SPI code
Arthur Heymans
2019-11-10
soc/intel/broadwell: Use common SB RTC code
Arthur Heymans
2019-11-03
intel/broadwell: Switch to TSC_MONOTONIC_TIMER
Kyösti Mälkki
2019-11-03
cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATE
Kyösti Mälkki
2019-08-11
arch/x86: Flip option NO_CAR_GLOBAL_MIGRATION
Kyösti Mälkki
2019-08-11
arch/x86: Enable POSTCAR_CONSOLE by default
Kyösti Mälkki
2019-08-08
lib/stage_cache: Refactor Kconfig options
Kyösti Mälkki
2019-07-09
arch/x86: Flip HAVE_MONOTONIC_TIMER default
Kyösti Mälkki
2019-07-09
cpu/x86: Flip SMM_TSEG default
Kyösti Mälkki
2019-06-28
{soc,northbridge}/Kconfig: Remove unused CACHE_MRC_SIZE_KB
Elyes HAOUAS
2019-05-15
soc/intel/broadwell: Enable LPC/SIO setup in bootblock
Arthur Heymans
2019-05-15
nb/intel/broadwell: Add an option for where verstage starts
Arthur Heymans
2019-05-15
soc/intel/broadwell: Use C_ENVIRONMENT_BOOTBLOCK
Arthur Heymans
2019-04-30
vboot: refactor OPROM code
Joel Kitching
2019-04-25
cpu/intel/car/non-evict: Select NO_FIXED_XIP_ROM_SIZE
Arthur Heymans
2019-04-01
vboot: Select CONFIG_VBOOT_OPROM_MATTERS in more cases
Julius Werner
2019-01-06
Kconfig: Unify power-after-failure options
Nico Huber
2018-12-30
arch/x86: Use a common timestamp.inc with romcc bootblocks
Kyösti Mälkki
2018-12-24
soc/intel/*: Select SUPPORT_CPU_UCODE_IN_CBFS only once
Arthur Heymans
2018-12-05
soc/intel/broadwell: Implement postcar stage
Arthur Heymans
2018-11-16
soc/intel/{broadwell,skylake}: Remove unused SERIAL_CPU_INIT
Elyes HAOUAS
2018-10-22
intel: Use CF9 reset (part 1)
Patrick Rudolph
2018-09-13
src/*/intel/: clarify Kconfig options regarding IFD
Stefan Tauner
2018-08-13
soc/intel/broadwell/Kconfig: Clean up redefined config options
Arthur Heymans
2018-06-06
arch/x86: Make RELOCATABLE_RAMSTAGE the default
Kyösti Mälkki
2018-05-08
intel/broadwell: Add option to enable/disable the PCIe AER capability
Youness Alaoui
2018-03-15
soc/intel/broadwell: add support for Intel GMA OpRegion
Matt DeVillier
2017-12-17
soc/intel/broadwell: remove CACHE_MRC_SETTINGS option
Aaron Durbin
2017-08-07
usbdebug: Remove redundant setup
Kyösti Mälkki
2017-06-09
soc/broadwell: Allow disabling of PCIe ASPM options
Youness Alaoui
2017-03-28
vboot: Select SoC-specific configuration for all Chrome OS boards
Julius Werner
2017-02-20
Revert "intel/lynxpoint,broadwell: Fix eDP display in Windows, SeaBios & Tiano"
Matt DeVillier
2016-12-27
cpu/intel/common: Add/Use common function to set virtualization
Matt DeVillier
2016-12-07
MMCONF_SUPPORT: Flip default to enabled
Kyösti Mälkki
2016-11-22
Remove explicit select MMCONF_SUPPORT
Kyösti Mälkki
2016-11-08
intel car: Remove references to DCACHE_RAM_ROMSTACK_SIZE
Kyösti Mälkki
2016-10-02
Kconfig: Update default hex values to start with 0x
Martin Roth
2016-08-19
Kconfig: introduce writable boot device notion
Aaron Durbin
2016-08-08
chromeos chipsets: select RTC usage
Aaron Durbin
2016-08-02
intel/lynxpoint,broadwell: Fix eDP display in Windows, SeaBios & Tiano
Prabal Saha
2016-07-31
src/soc: Capitalize CPU, ACPI, RAM and ROM
Elyes HAOUAS
2016-07-15
soc/intel/broadwell: use common Intel ACPI hardware definitions
Aaron Durbin
2016-05-04
cpu/x86: remove BACKUP_DEFAULT_SMM_REGION option
Aaron Durbin
2015-10-05
Add EM100 'hyper term' spi console support in ramstage & smm
Martin Roth
2015-09-17
broadwell: Switch to using common ACPI _SWS code
Duncan Laurie
2015-09-16
Move final Intel chipsets with ME to intel/common/firmware
Martin Roth
2015-09-09
x86: bootblock: remove linking and program flow from build system
Aaron Durbin
2015-08-31
soc/intel: Fix dependency of CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
Alexandru Gagniuc
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