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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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intel
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broadwell
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Age
Commit message (
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Author
2017-03-10
soc/intel/broadwell: Rework IGD's CDClk selection
Nico Huber
2017-02-22
Broadwell/Sata: Add support for setting IOBP registers for Ports 2 and 3.
Youness Alaoui
2016-12-07
soc/broadwell: set EM4/EM5 registers based on cdclk
Matt DeVillier
2016-07-30
chromeos mainboards: remove chromeos.asl
Aaron Durbin
2016-07-15
soc/intel/broadwell: use common Intel ACPI hardware definitions
Aaron Durbin
2016-05-06
soc/intel/broadwell: convert to using common MP and SMM init
Aaron Durbin
2015-12-27
broadwell: Fix SATA Gen3 DTLE configuration registers
Duncan Laurie
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-15
cpu/mtrr.h: Fix macro names for MTRR registers
Alexandru Gagniuc
2015-09-22
coreboot: introduce commonlib
Aaron Durbin
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-18
broadwell: Set C9/C10 vccmin
Duncan Laurie
2015-04-18
broadwell: add ROM stage pre console init call back
Wenkai Du
2015-04-15
broadwell: Fixes for _SWS support
Duncan Laurie
2015-04-15
broadwell: Clean up ME device and add new ME10 flow
Duncan Laurie
2015-04-14
broadwell: Remove TPM device from lpc.asl
Duncan Laurie
2015-04-10
broadwell: Correct XHCI offset for USB 3.0 ports
Julius Werner
2015-04-10
broadwell: Add function to apply PRR to a range of SPI flash
Duncan Laurie
2015-04-10
broadwell: Update SATA Gen3 TX adjustment registers
Duncan Laurie
2015-04-10
broadwell: Add support for ACPI \_GPE._SWS
Duncan Laurie
2015-04-07
broadwell: Change all SoC headers to <soc/headername.h> system
Julius Werner