| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-05-13 | baytrail: broadwell: correct refcode loading | Aaron Durbin |
| 2015-04-22 | coreboot: common stage cache | Aaron Durbin |
| 2015-04-10 | Broadwell: Set boot_mode of pei_data before running reference code | Kenji Chen |
| 2015-04-07 | broadwell: Change all SoC headers to <soc/headername.h> system | Julius Werner |
| 2015-04-03 | rmodule: use struct prog while loading rmodules | Aaron Durbin |
| 2015-03-30 | broadwell: fix HAVE_REFCODE_BLOB build errors | Aaron Durbin |
| 2015-03-10 | ACPI: Get S3 resume state from romstage_handoff | Kyösti Mälkki |
| 2014-11-09 | src: Too many terminators ';;' at end of stmts, stop Skynet | Edward O'Callaghan |
| 2014-10-22 | broadwell: add new intel SOC | Duncan Laurie |
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index : coreboot | |
| Some coreboot project code with my work | vimacs |
| summaryrefslogtreecommitdiff |