index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
broadwell
/
refcode.c
Age
Commit message (
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Author
2017-03-17
soc/intel/broadwell: Fix {}, () and conditional issues
Lee Leahy
2016-07-15
soc/intel/broadwell: use common Intel ACPI hardware definitions
Aaron Durbin
2015-12-10
lib: remove assets infrastructure
Aaron Durbin
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-06-23
intel/broadwell: Fix refcode handling
Patrick Georgi
2015-06-02
assets: abstract away the firmware assets used for booting
Aaron Durbin
2015-06-02
cbfs: new API and better program loading
Aaron Durbin
2015-05-29
intel/broadwell: Hide use of acpi_slp_type
Kyösti Mälkki
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-05-13
baytrail: broadwell: correct refcode loading
Aaron Durbin
2015-04-22
coreboot: common stage cache
Aaron Durbin
2015-04-10
Broadwell: Set boot_mode of pei_data before running reference code
Kenji Chen
2015-04-07
broadwell: Change all SoC headers to <soc/headername.h> system
Julius Werner
2015-04-03
rmodule: use struct prog while loading rmodules
Aaron Durbin
2015-03-30
broadwell: fix HAVE_REFCODE_BLOB build errors
Aaron Durbin
2015-03-10
ACPI: Get S3 resume state from romstage_handoff
Kyösti Mälkki
2014-11-09
src: Too many terminators ';;' at end of stmts, stop Skynet
Edward O'Callaghan
2014-10-22
broadwell: add new intel SOC
Duncan Laurie