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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
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intel
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broadwell
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romstage
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romstage.c
Age
Commit message (
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Author
2016-07-15
soc/intel/broadwell: use common Intel ACPI hardware definitions
Aaron Durbin
2016-06-29
intel romstage: Use run_ramstage()
Kyösti Mälkki
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-09-24
coreboot: move TS_END_ROMSTAGE to one spot
Aaron Durbin
2015-09-23
chromeos: vboot and chromeos dependency removal for sw write protect state
Paul Kocialkowski
2015-06-23
broadwell: fix typo
Patrick Georgi
2015-05-27
Move TPM code out of chromeos
Vladimir Serbinenko
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-30
chromeos: Add missing headers
Patrick Georgi
2015-04-22
coreboot: common stage cache
Aaron Durbin
2015-04-21
broadwell: Implement Recovery Button
Ryan Lin
2015-04-18
broadwell: add ROM stage pre console init call back
Wenkai Du
2015-04-07
broadwell: Change all SoC headers to <soc/headername.h> system
Julius Werner
2015-03-27
broadwell: Read and save HSIO version from ME in romstage
Duncan Laurie
2015-01-14
baytrail broadwell: Use timestamps internal stash
Kyösti Mälkki
2015-01-05
timestamps: Switch from tsc_t to uint64_t
Stefan Reinauer
2014-12-31
broadwell: Preparations for building
Marc Jones
2014-10-22
broadwell: ACPI, romstage, and other updates
Duncan Laurie
2014-10-22
broadwell: add new intel SOC
Duncan Laurie
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