coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2019-05-09	soc/intel/cannonlake: Fix pcie clock number	Lijian Zhao
2019-05-06	soc/intel/cannonlake: Add GPIO dual-route support.	Tim Wawrzynczak
2019-04-30	vboot: refactor OPROM code	Joel Kitching
2019-04-25	3rdparty/fsp: Update submodule pointer to upstream master	Matt DeVillier
2019-04-23	soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig	Kane Chen
2019-04-22	Revert "soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML"	Lijian Zhao
2019-04-16	soc/intel/cannonlake: Implement soc side VMX support	Ronak Kanabar
2019-04-16	soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML	Subrata Banik
2019-04-12	soc/intel/cannonlake: Select FSP_M_XIP	Furquan Shaikh
2019-04-12	soc/intel/cannonlake: Do not use XIP_ROM_SIZE	Furquan Shaikh
2019-02-28	soc/intel/cannonlake: Add CometLake SoC support	Subrata Banik
2019-02-27	soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN#	Rizwan Qureshi
2019-02-07	soc/intel/cannonlake: Add Whiskeylake SoC kconfig	Subrata Banik
2019-02-04	soc/intel/cannonlake: Remove SOC_INTEL_CANNONLAKE_MEMCFG_INIT Kconfig	Subrata Banik
2019-01-12	soc/intel/cannonlake: Hook up Microcode	Lijian Zhao
2019-01-10	Untangle CBFS microcode updates	Nico Huber
2019-01-09	soc/intel: Clean mess around UART_DEBUG	Nico Huber
2018-12-07	soc/intel/cannonlake: Fix I2C clock input	Duncan Laurie
2018-12-04	soc/intel/cannonlake: Increase bootblock size	Duncan Laurie
2018-10-27	soc/intel/*: Make FSP header path user configurable	Patrick Georgi
2018-10-25	soc/intel: Consolidate FSP CAR setup and teardown code	Praveen hodagatta pranesh
2018-10-22	intel: Use CF9 reset (part 2)	Patrick Rudolph
2018-10-19	soc/intel/cannonlake: Enable HDA driver support	praveen hodagatta pranesh
2018-10-17	soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions	praveen hodagatta pranesh
2018-10-17	soc/intel/cannonlake: Add new cannon lake PCH-H support	praveen hodagatta pranesh
2018-10-12	drivers/intel/fsp2_0: Hook up IntelFSP repo	Patrick Georgi
2018-09-14	soc/intel/denverton_ns: Enable common block PMC	Julien Viard de Galbert
2018-09-13	src/*/intel/: clarify Kconfig options regarding IFD	Stefan Tauner
2018-09-10	soc/intel/cannonlake: Correct number of root ports for CNL PCH H	Maulik V Vaghela
2018-08-28	soc/intel/cannonlake: Change LPDDR4 to MEMCFG	Lijian Zhao
2018-08-03	soc/intel/coffeelake: Add initial coffeelake support	Lijian Zhao
2018-06-23	soc/intel/cannonlake: Disable UART_DEBUG by default	Subrata Banik
2018-06-12	drivers/intel/gma: Unify VBT related Kconfig names	Nico Huber
2018-06-06	arch/x86: Make RELOCATABLE_RAMSTAGE the default	Kyösti Mälkki
2018-06-06	soc/intel/common/block: Add common chip config block	Subrata Banik
2018-06-06	soc/intel/{cannonlake, skylake}: Select Gen-6 PCH binding for SKL/CNL	Subrata Banik
2018-05-30	soc/intel/cannonlake: Enable IDT and expection handling support for all stages	Aamir Bohra
2018-05-27	soc/intel/cannonlake: Select common XHCI code	Subrata Banik
2018-05-25	soc/intel/cannonlake: Reduce STACK_SIZE to 4KiB	Subrata Banik
2018-05-19	soc/intel/cannonlake: Add CONFIG_SMM_RESERVED_SIZE config	Subrata Banik
2018-05-05	soc/intel/cannonlake: Include stage cache support for CNL	Subrata Banik
2018-05-04	ifdtool: Add a list of known platforms that support IFD_VERSION_2	Furquan Shaikh
2018-04-10	soc/intel/cannonlake: Set Cannonlake I2C clock	Lijian Zhao
2018-04-10	soc/intel/common: prepare for lpss clock split	Aaron Durbin
2018-03-28	soc/intel/cannonlake: Limit xDCI feature when VBOOT is enabled	Duncan Laurie
2018-02-07	soc/intel/cannonlake: Select SOC_AHCI_PORT_IMPLEMENTED_INVERT Kconfig for CNP...	Subrata Banik
2018-02-06	soc/intel/cannonlake: Increase heap size	John Zhao
2018-01-31	soc/intel/cannonlake: CannonaLake make use of FVI information	Subrata Banik
2018-01-31	drivers/intel/fsp2_0: Unbind UDK2015 Kconfig from FSP2.0 driver	Subrata Banik
2018-01-23	mainboard/intel/cannonlake_rvp: Add support for MAX98373 speaker amp	N, Harshapriya