index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
cannonlake
/
Kconfig
Age
Commit message (
Expand
)
Author
2018-08-03
soc/intel/coffeelake: Add initial coffeelake support
Lijian Zhao
2018-06-23
soc/intel/cannonlake: Disable UART_DEBUG by default
Subrata Banik
2018-06-12
drivers/intel/gma: Unify VBT related Kconfig names
Nico Huber
2018-06-06
arch/x86: Make RELOCATABLE_RAMSTAGE the default
Kyösti Mälkki
2018-06-06
soc/intel/common/block: Add common chip config block
Subrata Banik
2018-06-06
soc/intel/{cannonlake, skylake}: Select Gen-6 PCH binding for SKL/CNL
Subrata Banik
2018-05-30
soc/intel/cannonlake: Enable IDT and expection handling support for all stages
Aamir Bohra
2018-05-27
soc/intel/cannonlake: Select common XHCI code
Subrata Banik
2018-05-25
soc/intel/cannonlake: Reduce STACK_SIZE to 4KiB
Subrata Banik
2018-05-19
soc/intel/cannonlake: Add CONFIG_SMM_RESERVED_SIZE config
Subrata Banik
2018-05-05
soc/intel/cannonlake: Include stage cache support for CNL
Subrata Banik
2018-05-04
ifdtool: Add a list of known platforms that support IFD_VERSION_2
Furquan Shaikh
2018-04-10
soc/intel/cannonlake: Set Cannonlake I2C clock
Lijian Zhao
2018-04-10
soc/intel/common: prepare for lpss clock split
Aaron Durbin
2018-03-28
soc/intel/cannonlake: Limit xDCI feature when VBOOT is enabled
Duncan Laurie
2018-02-07
soc/intel/cannonlake: Select SOC_AHCI_PORT_IMPLEMENTED_INVERT Kconfig for CNP...
Subrata Banik
2018-02-06
soc/intel/cannonlake: Increase heap size
John Zhao
2018-01-31
soc/intel/cannonlake: CannonaLake make use of FVI information
Subrata Banik
2018-01-31
drivers/intel/fsp2_0: Unbind UDK2015 Kconfig from FSP2.0 driver
Subrata Banik
2018-01-23
mainboard/intel/cannonlake_rvp: Add support for MAX98373 speaker amp
N, Harshapriya
2018-01-23
soc/intel/cannonlake: Add audio NHLT support
Lijian Zhao
2018-01-17
soc/intel/cannonlake: Add option to select FSP_CAR
Subrata Banik
2018-01-07
soc/intel/cannonlake: provide LPDDR4 memory init
Nick Vaccaro
2018-01-05
soc/intel/cannonlake: Correct PMC/GPIO routing information
Lijian Zhao
2017-12-23
soc/intel/cannonlake: Select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
Furquan Shaikh
2017-12-22
ic2/designware: Move Intel i2c logic to shared driver
Chris Ching
2017-12-16
soc/intel/common/fast_spi: implement spi_flash_ctrlr_protect_region()
Aaron Durbin
2017-12-07
soc/intel/cannonlake: Make use of Intel common Graphics block
Subrata Banik
2017-11-13
soc/intel/cannonlake: Define default LPSS clock
Lijian Zhao
2017-11-11
soc/intel/cannonlake: Make use of Intel SPI common block
Subrata Banik
2017-11-04
soc/intel/cannonlake: Add DSP support
Lijian Zhao
2017-11-04
soc/intel/cannonlake: Install common i2c
Lijian Zhao
2017-11-01
soc/intel/cannonlake: Use SCS common code
Bora Guvendik
2017-10-27
soc/intel/cannonlake: Use common p2sb driver
Lijian Zhao
2017-10-23
soc/intel/cannonlake: Increase stack size from 4KiB to 8KiB
John Zhao
2017-10-22
soc/intel/cannonlake: Change max root port to 16
Lijian Zhao
2017-10-19
soc/intel/cannonlake: Add IGD Support and pre-OS display code
Abhay Kumar
2017-10-18
soc/intel/cannonlake: Use EBDA area to store cbmem_top address
Subrata Banik
2017-10-11
soc/intel/cannonlake: Change default UART number to 2
Lijian Zhao
2017-10-06
soc/intel/cannonlake: Enable MRC cache
Lijian Zhao
2017-10-06
soc/intel/cannonlake: reduce bootblock size
Aaron Durbin
2017-10-03
soc/intel/cannonlake: Fill the SMI usage
Lijian Zhao
2017-10-03
soc/intel/cannonlake: Add lpc pci driver
Lijian Zhao
2017-09-27
soc/intel/cannonlake: Add FSP GOP support
Abhay kumar
2017-09-13
soc/intel/cannonlake: Add common ACPI support for CNL
Lijian Zhao
2017-09-06
soc/intel/cannonlake: Add Vboot/ChromeOS support
Lijian Zhao
2017-09-01
soc/intel/cannonlake: Define Max PCIE Root Ports
Pratik Prajapati
2017-09-01
soc/intel/cannonlake: add gpio files to make
Nick Vaccaro
2017-09-01
soc/intel/canonlake: Enable LPSS UART in 32bit PCI mode
Lijian Zhao
2017-08-30
soc/intel/{cannonlake,skylake}: Add active default value for UART_FOR_CONSOLE
Subrata Banik
[next]