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Some coreboot project code with my work
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Age
Commit message (
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Author
2019-10-20
soc/intel/{cnl, icl}: Update the DCACHE_BSP_STACK_SIZE to 129KiB
V Sowmya
2019-09-13
soc/intel/cannonlake: Allow coreboot to reserve stack for fsp
Bora Guvendik
2019-09-11
intel/fsp2_0: Add help text for FSP_TEMP_RAM_SIZE Kconfig
Subrata Banik
2019-09-02
security/intel: Add TXT infrastructure
Patrick Rudolph
2019-08-11
arch/x86: Flip option NO_CAR_GLOBAL_MIGRATION
Kyösti Mälkki
2019-08-11
arch/x86: Enable POSTCAR_CONSOLE by default
Kyösti Mälkki
2019-08-08
lib/stage_cache: Refactor Kconfig options
Kyösti Mälkki
2019-08-02
soc/intel/common/pch: Move thermal kconfig selection into common/pch
Subrata Banik
2019-07-31
soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlake
Aamir Bohra
2019-07-31
soc/intel/cannonlake: Enable PCH Thermal Sensor configuration for S0ix
Sumeet Pawnikar
2019-07-16
soc/intel/{cnl,icl}: Always use CAR NEM enhanced by default
Angel Pons
2019-07-11
soc/intel/common/timer: Move USE_LEGACY_8254_TIMER into common/block/timer
Subrata Banik
2019-07-09
arch/x86: Flip HAVE_MONOTONIC_TIMER default
Kyösti Mälkki
2019-07-09
cpu/x86: Flip SMM_TSEG default
Kyösti Mälkki
2019-07-06
soc/intel/cannonlake: Override PRERAM_CBMEM_CONSOLE_SIZE default value
Subrata Banik
2019-07-02
soc/intel/cannonlake: Add support to log XHCI wake events
Paul Fagerburg
2019-07-01
Use 3rdparty/intel-microcode
Arthur Heymans
2019-06-28
soc/intel/cannonlake: fix use of legacy 8254 timer
Matt DeVillier
2019-06-26
soc/intel/cannonlake/Kconfig: Don't have all variants select SOC_INTEL_CANNON...
Arthur Heymans
2019-06-21
soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASE
Arthur Heymans
2019-06-13
soc/intel/{cml, whl}: Add option to skip HECI disable in SMM
Subrata Banik
2019-06-03
soc/intel: Replace UART_BASE() and friends with a Kconfig
Nico Huber
2019-05-09
soc/intel/cannonlake: Fix pcie clock number
Lijian Zhao
2019-05-06
soc/intel/cannonlake: Add GPIO dual-route support.
Tim Wawrzynczak
2019-04-30
vboot: refactor OPROM code
Joel Kitching
2019-04-25
3rdparty/fsp: Update submodule pointer to upstream master
Matt DeVillier
2019-04-23
soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig
Kane Chen
2019-04-22
Revert "soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML"
Lijian Zhao
2019-04-16
soc/intel/cannonlake: Implement soc side VMX support
Ronak Kanabar
2019-04-16
soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML
Subrata Banik
2019-04-12
soc/intel/cannonlake: Select FSP_M_XIP
Furquan Shaikh
2019-04-12
soc/intel/cannonlake: Do not use XIP_ROM_SIZE
Furquan Shaikh
2019-02-28
soc/intel/cannonlake: Add CometLake SoC support
Subrata Banik
2019-02-27
soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN#
Rizwan Qureshi
2019-02-07
soc/intel/cannonlake: Add Whiskeylake SoC kconfig
Subrata Banik
2019-02-04
soc/intel/cannonlake: Remove SOC_INTEL_CANNONLAKE_MEMCFG_INIT Kconfig
Subrata Banik
2019-01-12
soc/intel/cannonlake: Hook up Microcode
Lijian Zhao
2019-01-10
Untangle CBFS microcode updates
Nico Huber
2019-01-09
soc/intel: Clean mess around UART_DEBUG
Nico Huber
2018-12-07
soc/intel/cannonlake: Fix I2C clock input
Duncan Laurie
2018-12-04
soc/intel/cannonlake: Increase bootblock size
Duncan Laurie
2018-10-27
soc/intel/*: Make FSP header path user configurable
Patrick Georgi
2018-10-25
soc/intel: Consolidate FSP CAR setup and teardown code
Praveen hodagatta pranesh
2018-10-22
intel: Use CF9 reset (part 2)
Patrick Rudolph
2018-10-19
soc/intel/cannonlake: Enable HDA driver support
praveen hodagatta pranesh
2018-10-17
soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions
praveen hodagatta pranesh
2018-10-17
soc/intel/cannonlake: Add new cannon lake PCH-H support
praveen hodagatta pranesh
2018-10-12
drivers/intel/fsp2_0: Hook up IntelFSP repo
Patrick Georgi
2018-09-14
soc/intel/denverton_ns: Enable common block PMC
Julien Viard de Galbert
2018-09-13
src/*/intel/: clarify Kconfig options regarding IFD
Stefan Tauner
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