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Some coreboot project code with my work
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Author
2019-02-27
soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN#
Rizwan Qureshi
2019-02-27
soc/intel/cannonlake: Add ASL functions to manipulate RX/TX buffers
Rizwan Qureshi
2019-02-26
soc/intel/cannonlake: Update GPIO definitions for Virtual GPIO
Rizwan Qureshi
2019-02-22
soc/intel/cannonlake: Add ASL function for setting pad mode
Rizwan Qureshi
2019-02-20
src/soc/intel/cannonlake: Add _DSM methods for LPIT table
Lijian Zhao
2019-01-23
soc/intel/cannonlake: Replace device name B0D4 with TCPU
Sumeet Pawnikar
2019-01-03
soc/intel/cannonlake: Add cannonlake ACPI GPIO op
Lijian Zhao
2018-12-10
soc/intel/cannonlake: Fix GPIO reporting
Duncan Laurie
2018-12-04
soc/intel/cannonlake: Add DPTF ACPI code
Duncan Laurie
2018-11-30
cpu/intel/common: Use a common acpi/cpu.asl file
Arthur Heymans
2018-11-30
soc/intel/common: Rework acpi/cpu.asl
Arthur Heymans
2018-11-15
soc/intel/cannonlake: Make static IRQ mapping for CNP PCH pci devices
Subrata Banik
2018-11-07
mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT gener...
Subrata Banik
2018-10-25
soc/intel/cannonlake: Enable S4 sleep state support
praveen hodagatta pranesh
2018-10-17
soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions
praveen hodagatta pranesh
2018-10-09
soc/intel/cannonlake: Add PCIE ASL entry
Subrata Banik
2018-10-09
soc/intel/cannonlake: Make correct IRQ mapping for CNL SA and PCH PCI devices
Subrata Banik
2018-09-28
soc/intel/cannonlake: Add ACPI entry for LAN
Lijian Zhao
2018-08-30
soc/intel/cannonlake: Fix comment errors for SMBUS
Lijian Zhao
2018-04-05
soc/intel/cannonlake: Clear EMMC timeout when boot source is not EMMC
Bora Guvendik
2018-02-22
soc/intel/cannonlake: Clear EMMC timeout register
Lijian Zhao
2018-02-16
soc/intel/cannonlake: Update GPIO ASL
Lijian Zhao
2018-02-16
soc/intel/cannonlake: Use common PCR ASL
Lijian Zhao
2018-01-24
soc/intel/cannonlake: Add child CARD device into eMMC/SD controller
Subrata Banik
2018-01-24
soc/intel/cannonlake: Port SD Controller W/A from Intel Reference code
Subrata Banik
2018-01-24
soc/intel/cannonlake: Port eMMC controller W/A from Intel Reference code
Subrata Banik
2017-12-13
src/soc/intel/cannonlake: Add _PRW for CNVi
Bora Guvendik
2017-11-23
soc/intel/cannonlake: Add PM methods to power gate SD card controller
Vaibhav Shankar
2017-11-20
soc/intel/cannonlake: Add ACPI workaround for EMMC
Lijian Zhao
2017-11-17
soc/intel/cannonlake: Add cpu.asl file
Shaunak Saha
2017-11-15
soc/intel/cannonlake: Fix and clean up xhci ACPI code
Vaibhav Shankar
2017-10-20
soc/intel/cannonlake: Add platform.asl
Lijian Zhao
2017-10-12
soc/intel/cannonlake: add length information for communities
Bora Guvendik
2017-10-12
soc/intel/cannonlake: Add ACPI platform sleep capability
Vaibhav Shankar
2017-10-05
soc/intel/cannonlake: Add all the SOC level DSDT tables
Lijian Zhao
2017-10-03
soc/intel/cannonlake: add initial ASL methods for SCS, GPIO
Bora Guvendik
2017-10-03
soc/intel/cannonlake: Add northbridge dsdt table
Lijian Zhao
2017-09-19
soc/intel/cannonlake: Add PCIE IRQs
Bora Guvendik
2017-09-13
soc/intel/cannonlake: Add common ACPI support for CNL
Lijian Zhao
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