summaryrefslogtreecommitdiff
path: root/src/soc/intel/cannonlake/chip.h
AgeCommit message (Expand)Author
2020-06-02soc/intel/cannonlake: Add RP configuration settingsChristian Walter
2020-05-26cannonlake: update processor power limits configurationSumeet R Pawnikar
2020-05-26soc/intel/cannonlake: Add VrPowerDeliveryDesign to chip optionsChristian Walter
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-04soc/intel/cannonlake: Add DisableHeciRetry to configChristian Walter
2020-05-01src: Remove not used 'include <smbios.h>'Elyes HAOUAS
2020-04-06soc/intel/cannonlake: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-18soc: Remove copyright noticesPatrick Georgi
2020-03-17soc/intel/cannonlake: Set correct serirq modeJeremy Soller
2020-03-04src: capitalize 'PCIe'Elyes HAOUAS
2020-02-28soc/intel/cannonlake: Plumb TetonGlacierMode into dtEdward O'Callaghan
2020-02-04soc/intel/cannonlake: Allow Audio DSP OSC qualification for low power idleAamir Bohra
2020-01-18soc/intel/cannonlake: Add chip config for SATA strengthJamie Chen
2020-01-08soc/intel/cannonlake: Add VR config for CMLJamie Chen
2019-12-12soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.hFurquan Shaikh
2019-11-27soc/intel/cannonlake: Disable USB2 PHY Power gatingSurendranath Gurivireddy
2019-11-26soc/intel/cannonlake: Add chip config to override CPU flex ratioSubrata Banik
2019-11-04soc/intel/sgx: convert SGX and PRMRR devicetree options to KconfigMichael Niewöhner
2019-09-29soc/intel: Rename <intelblocks/chip.h>Kyösti Mälkki
2019-09-12soc/intel/cnl: Remove unnecessary FSP UPD “PchPwrOptEnable” usageSubrata Banik
2019-09-12soc/intel/cannonlake: Add config for sata devslp pad reset configurationAamir Bohra
2019-08-26soc/intel/cannonlake: Add config to disable display audio codecAamir Bohra
2019-08-20soc/intel/cnl: Add provision to configure SD controller write protect pinAamir Bohra
2019-06-28soc/intel/cannonlake: fix use of legacy 8254 timerMatt DeVillier
2019-06-21soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASEArthur Heymans
2019-05-20soc/intel/cannonlake: Make use of gpio_pm_configure()Subrata Banik
2019-05-11soc/intel/cnl: Enable VT-dJohn Zhao
2019-05-09soc/intel/cannonlake: Fix pcie clock numberLijian Zhao
2019-05-07mb/google/sarien: Add SMBIOS type 9 fieldsLijian Zhao
2019-05-01mb/google/sarien: Disable S5 wake on LAN by defaultEric Lai
2019-04-23soc/intel/cannonlake: Enable PlatformDebugConsent by KconfigKane Chen
2019-04-16soc/intel/cannonlake: Configure Vmx support using KconfigRonak Kanabar
2019-04-01soc/intel/cannonlake: Add FSP UPD to unlock GPIO pads in devicetreeKrishna Prasad Bhat
2019-03-27soc/intel/cannonlake: Configure voltage margining policiesKrzysztof Sywula
2019-03-21soc/intel/cannonlake: Assign FSP UPDs for HPD and Data/CLK of DDI portsKrishna Prasad Bhat
2019-03-16soc/intel/cannonlake: Add required FSP UPD changes for CMLSubrata Banik
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-02-22soc/intel/cannonlake: Add support for setting FSP-S PcieRpHotPlug from device...Jeremy Soller
2019-02-21src/soc/intel/cannonlake: Add PsysPmax settingGaggery Tsai
2019-02-07soc/intel/cannonlake: Add Whiskeylake SoC kconfigSubrata Banik
2019-01-28src/soc/intel/cnl/chip.h: Fix preprocessor conditionAngel Pons
2019-01-17soc/intel/cannonlake: Change in SaGv optionsRonak Kanabar
2019-01-16soc/intel/cannonlake: Add processor power limits control supportSumeet Pawnikar
2019-01-08soc/intel/cannonlake: Add FSP UPD for minimum assertion widthDuncan Laurie
2018-12-19soc/intel/cannonlake: SATA and DMI power optimizeLijian Zhao
2018-12-19soc/intel/cannonlake: Auto turn on HDA controllerLijian Zhao
2018-12-19soc/intel/cannonlake: Declare SATA Mode clearLijian Zhao
2018-12-19soc/intel/cannonlake: Add Acoustic featuresLijian Zhao
2018-11-17soc/intel/cannonlake: Add options for pcie ltrLijian Zhao
2018-11-15soc/intel/cannonlake: Make static IRQ mapping for PIC modeSubrata Banik