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path: root/src/soc/intel/cannonlake/fsp_params.c
AgeCommit message (Expand)Author
2019-04-22Revert "soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML"Lijian Zhao
2019-04-16soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CMLSubrata Banik
2019-04-08Replace remaining IS_ENABLED(CONFIG_*) with CONFIG()Nico Huber
2019-04-01soc/intel/cannonlake: Add FSP UPD to unlock GPIO pads in devicetreeKrishna Prasad Bhat
2019-03-29soc/intel/cannonlake: Ignore GBE LTRLijian Zhao
2019-03-27soc/intel/cannonlake: Configure voltage margining policiesKrzysztof Sywula
2019-03-21soc/intel/cannonlake: Assign FSP UPDs for HPD and Data/CLK of DDI portsKrishna Prasad Bhat
2019-03-20soc/intel/cannonlake: Fix return values for get_param_valueFurquan Shaikh
2019-03-16soc/intel/cannonlake: Add required FSP UPD changes for CMLSubrata Banik
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-02-27soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN#Rizwan Qureshi
2019-02-22soc/intel/cannonlake: Add support for setting FSP-S PcieRpHotPlug from device...Jeremy Soller
2019-02-21src/soc/intel/cannonlake: Add PsysPmax settingGaggery Tsai
2019-02-13soc/intel/cannonlake: Configure serial debug uartRonak Kanabar
2019-01-14soc/intel/cannonlake: Provide interface to update TCC offsetJohn Su
2019-01-08soc/intel/cannonlake: Add FSP UPD for minimum assertion widthDuncan Laurie
2019-01-01soc/intel/cannonlake: Enable CNVi based on devicetreeMaulik V Vaghela
2018-12-19soc/intel/cannonlake: SATA and DMI power optimizeLijian Zhao
2018-12-19soc/intel/cannonlake: Add Acoustic featuresLijian Zhao
2018-11-17soc/intel/cannonlake: Add options for pcie ltrLijian Zhao
2018-11-05soc/intel/cannonlake: Remove depreciated UPD selectionLijian Zhao
2018-10-09soc/intel/cannonlake: Disable Legacy PME for Root portsSubrata Banik
2018-10-08Move compiler.h to commonlibNico Huber
2018-10-04soc/intel/cannonlake: Move the FSP related callbacks to separate filesRizwan Qureshi