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path: root/src/soc/intel/cannonlake/gpio_cnp_h.c
AgeCommit message (Expand)Author
2020-09-17soc/intel/cannonlake: add missing special function padsMichael Niewöhner
2020-09-17soc/intel/cannonlake: rename "RSVD" GPIOs to their correct namesMichael Niewöhner
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-03-18soc: Remove copyright noticesPatrick Georgi
2019-05-20soc/intel/cannonlake: Make use of gpio_pm_configure()Subrata Banik
2019-04-29soc/intel: Add GPI interrupt config register offset infoKarthikeyan Ramasubramanian
2019-02-26soc/intel/cannonlake: Update GPIO definitions for Virtual GPIORizwan Qureshi
2018-12-14soc/intel/cannonlake: Fix CNL-H GPIO pin mapDuncan Laurie
2018-10-17soc/intel/cannonlake: Add CNP PCH-H gpio pin definitionspraveen hodagatta pranesh