coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2019-08-15	intel/smm: Define struct ied_header just once	Kyösti Mälkki
2019-08-15	soc/intel: Rename some SMM support functions	Kyösti Mälkki
2019-08-15	intel/ice,sky,cannon: Drop unused EMRR and UNCORE_EMRR code	Kyösti Mälkki
2019-08-15	mainboard/google: Fix indirect includes	Kyösti Mälkki
2019-08-09	cpu/x86/smm: Drop SMI handler address from struct	Kyösti Mälkki
2019-08-08	arch/x86: Change smm_subregion() prototype	Kyösti Mälkki
2019-08-07	cpu/x86/smm: Promote smm_subregion()	Kyösti Mälkki
2019-07-25	soc/intel: Guard remaining SA_DEV_ROOT definition	Kyösti Mälkki
2019-07-21	soc/intel: Expand SA_DEV_ROOT for ramstage	Kyösti Mälkki
2019-07-17	soc/intel: Fix regression with hidden PCI devices	Kyösti Mälkki
2019-07-13	cpu/x86: Move smm_lock() prototype	Kyösti Mälkki
2019-07-10	soc/intel: Remove invalid smm_relocate stubs	Kyösti Mälkki
2019-07-07	soc/intel/{cannonlake,icelake}: Do not define PCH_DEV_PMC in ramstage	Furquan Shaikh
2019-07-07	soc/intel/cannonlake, mb/google/sarien: Get rid of unused dev param	Furquan Shaikh
2019-07-05	soc/intel/cannonlake: Fix PMC and GPIO block values for PCH-H	Jeremy Soller
2019-07-04	soc/intel: Replace uses of dev_find_slot()	Kyösti Mälkki
2019-06-03	soc/intel: Replace UART_BASE() and friends with a Kconfig	Nico Huber
2019-05-28	soc/intel/cannonlake: Dump ME status info before notify EndOfFirmware	Bora Guvendik
2019-05-22	soc/intel/cannonlake: Dump ME f/w version and status information	Tim Wawrzynczak
2019-05-20	soc/intel/cannonlake: Make use of gpio_pm_configure()	Subrata Banik
2019-05-15	soc/intel/cannonlake: Support different SPD read type for each slot	Philip Chen
2019-04-29	soc/intel: Add GPI interrupt config register offset info	Karthikeyan Ramasubramanian
2019-04-29	soc/intel/cannonlake: Modify dq_map to provide for 6 entries	Paul Fagerburg
2019-04-26	soc/{amd,intel}/chip: Use local include for chip.h	Elyes HAOUAS
2019-04-18	soc/intel/cnl: Generate DMAR ACPI table	John Zhao
2019-04-11	soc/intel/cannonlake: Correct the GPE DWx mapping for GPIO groups	Aamir Bohra
2019-04-08	Replace remaining IS_ENABLED(CONFIG_*) with CONFIG()	Nico Huber
2019-03-29	soc/intel/cannonlake: Ignore GBE LTR	Lijian Zhao
2019-03-25	soc/intel/cannonlake: Clear PMCON status bits	Krishna Prasad Bhat
2019-03-16	soc/intel/cannonlake: Add required FSP UPD changes for CML	Subrata Banik
2019-03-13	soc/intel/cannonlake: Allow mainboard to override DRAM part number	Furquan Shaikh
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-03-04	soc/intel/cannonlake: Move common definitions to a header file	Rizwan Qureshi
2019-02-27	soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN#	Rizwan Qureshi
2019-02-27	soc/intel/cannonlake: Add ASL functions to manipulate RX/TX buffers	Rizwan Qureshi
2019-02-26	soc/intel/cannonlake: Update GPIO definitions for Virtual GPIO	Rizwan Qureshi
2019-02-22	soc/intel/cannonlake: Add ASL function for setting pad mode	Rizwan Qureshi
2019-02-21	soc/intel/cannonlake: Add field to identify single channel memory	Shelley Chen
2019-02-15	soc/intel/cannonlake: Define VR settings	Roy Mingi Park
2019-02-07	soc/intel/cannonlake: Configure GPIOs again after FSP-S is done	Furquan Shaikh
2019-01-25	soc/intel/cannonlake: Export function to set After G3 state	Duncan Laurie
2019-01-16	soc/intel/cannonlake: Add processor power limits control support	Sumeet Pawnikar
2019-01-16	buildsystem: Promote rules.h to default include	Kyösti Mälkki
2019-01-10	soc/intel/common/block: Move tco common functions into block/smbus	Subrata Banik
2019-01-09	soc/intel/cannonlake: Enable/Disable IPU based on devicetree switch	V Sowmya
2019-01-08	soc/intel/cannonlake: Add chipset event logging	Duncan Laurie
2019-01-03	soc/intel/cannonlake: Add cannonlake ACPI GPIO op	Lijian Zhao
2018-12-19	soc/intel/cannonlake: Amend comment typo	Lijian Zhao
2018-12-14	soc/intel/cannonlake: Fix CNL-H GPIO pin map	Duncan Laurie