| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-08-15 | soc/intel/cannonlake: Add postcar stage support | Lijian Zhao |
| 2017-07-24 | Update files with no newline at the end | Martin Roth |
| 2017-07-24 | Fix files with multiple newlines at the end. | Martin Roth |
| 2017-07-21 | Revert "soc/intel/cannonlake: Add postcar stage support" | Martin Roth |
| 2017-07-21 | soc/intel/cannonlake: Add postcar stage support | Lijian Zhao |
| 2017-07-19 | soc/intel/cannonlake: Add minimal changes to call FSP Memoryinit | Lijian Zhao |
 |
index : coreboot | |
| Some coreboot project code with my work | vimacs |
| summaryrefslogtreecommitdiff |