coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-28	soc/intel/common: Improve Type16 SMBIOS tables	Patrick Rudolph
2020-05-26	cannonlake: update processor power limits configuration	Sumeet R Pawnikar
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/intel/cannonlake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2019-05-11	soc/intel/cnl: Enable VT-d	John Zhao
2019-04-18	soc/intel/cnl: Generate DMAR ACPI table	John Zhao
2019-01-17	soc/intel/cannonlake: drop extra newline	Patrick Georgi
2019-01-16	soc/intel/cannonlake: Add processor power limits control support	Sumeet Pawnikar
2018-11-16	src: Remove unneeded include <console/console.h>	Elyes HAOUAS
2018-02-20	src/soc: Fix various typos	Jonathan Neuschäfer
2017-12-02	soc/intel/cannonlake: Initialize PMC controller	Subrata Banik
2017-08-09	soc/intel/cannonlake: Add ramstage SystemAgent support	Lijian Zhao