coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-06	soc/intel/cannonlake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2019-08-04	soc/intel/common/block/uart: Update the UART PCI device reference	Aamir Bohra
2019-06-03	soc/intel/{skl,cnl,icl}: Drop soc_uart_set_legacy_mode()	Nico Huber
2019-04-23	src: include <assert.h> when appropriate	Elyes HAOUAS
2019-04-23	src: Add missing include 'console.h'	Elyes HAOUAS
2019-03-20	src: Use 'include <string.h>' when appropriate	Elyes HAOUAS
2018-08-20	soc/intel/common/block: Move common uart function to block/uart	Subrata Banik
2018-06-14	src: Get rid of device_t	Elyes HAOUAS
2017-12-14	soc/intel/cannonlake: Fix UART2 serial log broken issue	Subrata Banik
2017-12-09	soc/intel/cannonlake: Clean up UART code	Aamir Bohra
2017-08-21	soc/intel/cannonlake: Add support for all UART port index	Subrata Banik
2017-08-16	soc/intel/cannonlake: Add proper support to enable UART2 in 16550 mode	Subrata Banik
2017-08-15	soc/intel/cannonlake: Add postcar stage support	Lijian Zhao
2017-07-21	Revert "soc/intel/cannonlake: Add postcar stage support"	Martin Roth
2017-07-21	soc/intel/cannonlake: Add postcar stage support	Lijian Zhao
2017-06-29	soc/intel/cannonlake: Add UART initialization	Andrey Petrov