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path: root/src/soc/intel/cannonlake
AgeCommit message (Expand)Author
2019-03-04arch/x86/acpi: Remove obsolete acpi_gen_regaddr resv fieldElyes HAOUAS
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2019-02-28soc/intel/cannonlake: Add CometLake SoC supportSubrata Banik
2019-02-28soc/intel/cannonlake: Disable ACPI mode on BS_DEV_INIT exitFurquan Shaikh
2019-02-28soc/intel/cannonlake: Add PCH series check for CML LP PCHMaulik V Vaghela
2019-02-28soc/intel/cannonlake: Add Comet Lake U SA 2+2 Device IDSubrata Banik
2019-02-27soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN#Rizwan Qureshi
2019-02-27soc/intel/cannonlake: Add ASL functions to manipulate RX/TX buffersRizwan Qureshi
2019-02-27soc/intel/cannonlake: Disable ACPI mode as part of pmc_soc_initFurquan Shaikh
2019-02-26soc/intel/cannonlake: Update GPIO definitions for Virtual GPIORizwan Qureshi
2019-02-26soc/intel/common: Include cometlake PCH IDsRonak Kanabar
2019-02-24soc/intel/common: Include cometlake SA IDsRonak Kanabar
2019-02-24soc/intel/common: Include cometlake CPU IDsRonak Kanabar
2019-02-23soc/intel/cannonlake: Make few more whitespace proper in MCH nameSubrata Banik
2019-02-22soc/intel/cannonlake: Add support for setting FSP-S PcieRpHotPlug from device...Jeremy Soller
2019-02-22soc/intel/cannonlake: Add ASL function for setting pad modeRizwan Qureshi
2019-02-22soc/intel/cannonlake: Add whitespace proper in CPU/MCH/IGD nameSubrata Banik
2019-02-21soc/intel/cannonlake: SoC specific microcode update checkRonak Kanabar
2019-02-21soc/intel/cannonlake: Add field to identify single channel memoryShelley Chen
2019-02-21src/soc/intel/cannonlake: Add PsysPmax settingGaggery Tsai
2019-02-20src/soc/intel/cannonlake: Add _DSM methods for LPIT tableLijian Zhao
2019-02-19soc/intel/common: Add whiskeylake celeron v-0 supportLijian Zhao
2019-02-18soc/intel: Add mem_rank info in SMBIOSFrancois Toguo
2019-02-15soc/intel/cannonlake: Define VR settingsRoy Mingi Park
2019-02-13soc/intel/cannonlake: Configure serial debug uartRonak Kanabar
2019-02-13soc/intel/cannonlake: Don't use CAR_GLOBALArthur Heymans
2019-02-07soc/intel/cannonlake: Configure GPIOs again after FSP-S is doneFurquan Shaikh
2019-02-07soc/intel/cannonlake: Add Whiskeylake SoC kconfigSubrata Banik
2019-02-04soc/intel/cannonlake: Remove SOC_INTEL_CANNONLAKE_MEMCFG_INIT KconfigSubrata Banik
2019-01-31soc/intel/cannonlake: Make correct C-state entries for S0ix and non-S0ixRonak Kanabar
2019-01-28src/soc/intel/cnl/chip.h: Fix preprocessor conditionAngel Pons
2019-01-25soc/intel/cannonlake: Export function to set After G3 stateDuncan Laurie
2019-01-25soc/intel/cannonlake: Disable CpuRatio and SaGv in recoveryDuncan Laurie
2019-01-23soc/intel/cannonlake: Replace device name B0D4 with TCPUSumeet Pawnikar
2019-01-17soc/intel/cannonlake: drop extra newlinePatrick Georgi
2019-01-17soc/intel/cannonlake: Change in SaGv optionsRonak Kanabar
2019-01-16soc/intel/cannonlake: Fix afterg3 programmingLijian Zhao
2019-01-16soc/intel/cannonlake: Access conf pointer only if its not nullPratik Prajapati
2019-01-16soc/intel/cannonlake: Add processor power limits control supportSumeet Pawnikar
2019-01-16buildsystem: Promote rules.h to default includeKyösti Mälkki
2019-01-14soc/intel/cannonlake: Provide interface to update TCC offsetJohn Su
2019-01-12soc/intel/cannonlake: Hook up MicrocodeLijian Zhao
2019-01-10soc/intel/cannonlake: complete rename of TCO2_STS_SECOND_TOPatrick Georgi
2019-01-10soc/intel/common/block: Move tco common functions into block/smbusSubrata Banik
2019-01-10Untangle CBFS microcode updatesNico Huber
2019-01-09soc/intel: Clean mess around UART_DEBUGNico Huber
2019-01-09soc/intel/cannonlake: Enable/Disable IPU based on devicetree switchV Sowmya
2019-01-08soc/intel/cannonlake: Add FSP UPD for minimum assertion widthDuncan Laurie
2019-01-08soc/intel/cannonlake: Add chipset event loggingDuncan Laurie
2019-01-08soc/intel/cannonlake: Fix chipset_power_state structureDuncan Laurie