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path: root/src/soc/intel/cannonlake
AgeCommit message (Expand)Author
2018-01-16soc/intel/cannonlake: Program DMI PCR settingsLijian Zhao
2018-01-10soc/intel/cannonlake: Add a call to gspi_early_bar_init in bootblockFurquan Shaikh
2018-01-09soc/intel/cannonlake: Remove redundent CNL CPUID macrosSubrata Banik
2018-01-08soc/intel/cannonlake: Initialize DDI-A lane in Normal modeAbhay Kumar
2018-01-07soc/intel/cannonlake: provide LPDDR4 memory initNick Vaccaro
2018-01-05soc/intel/cannonlake: Correct PMC/GPIO routing informationLijian Zhao
2017-12-23soc/intel/cannonlake: Select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2Furquan Shaikh
2017-12-23soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix in weak...Subrata Banik
2017-12-22soc/intel: Treat time-out as failure in HECILijian Zhao
2017-12-22ic2/designware: Move Intel i2c logic to shared driverChris Ching
2017-12-22soc/intel/cannonlake: Add SoC API to make use SMM common codeSubrata Banik
2017-12-22soc/intel/common: Add missing SoC common function into SMM librarySubrata Banik
2017-12-21soc/intel/cannonlake: Implement pmc_soc_restore_power_failure as per EDSSubrata Banik
2017-12-20soc/intel/cannonlake: Tell FSPM UART port numberLijian Zhao
2017-12-16soc/intel/common/fast_spi: implement spi_flash_ctrlr_protect_region()Aaron Durbin
2017-12-14soc/intel/cannonlake: Fix UART2 serial log broken issueSubrata Banik
2017-12-13src/soc/intel/cannonlake: Add _PRW for CNViBora Guvendik
2017-12-11soc/intel/cannonlake: Add support for D0 steppingLijian Zhao
2017-12-09soc/intel/cannonlake: Clean up UART codeAamir Bohra
2017-12-08soc/intel/cannonlake: Add PCH ID support in bootblock/report_platform.cSubrata Banik
2017-12-07soc/intel/cannonlake: Make use of Intel common Graphics blockSubrata Banik
2017-12-05soc/intel/cannonlake: Fix DSX_CFG macro name for AC_PRESENTFurquan Shaikh
2017-12-02soc/intel/cannonlake: Initialize PMC controllerSubrata Banik
2017-11-23soc/intel/cannonlake: Add PM methods to power gate SD card controllerVaibhav Shankar
2017-11-23soc/intel/cannonlake: Invoke pmc and hard reset only if CSE fails to resetJohn Zhao
2017-11-20soc/intel/cannonlake: Add ACPI workaround for EMMCLijian Zhao
2017-11-17soc/intel/cannonlake: fix gpio pin numbersBora Guvendik
2017-11-17soc/intel/cannonlake: Add cpu.asl fileShaunak Saha
2017-11-15soc/intel/cannonlake: Fix and clean up xhci ACPI codeVaibhav Shankar
2017-11-13soc/intel/cannonlake: Define default LPSS clockLijian Zhao
2017-11-11soc/intel/cannonlake: Make use of Intel SPI common blockSubrata Banik
2017-11-11soc/intel/{cannonlake,skylake}: Add _soc_ prefix in spi soc routineSubrata Banik
2017-11-10soc/intel/cannonlake: Remove structure variable initialization with 0Subrata Banik
2017-11-04soc/intel/cannonlake: Add DSP supportLijian Zhao
2017-11-04soc/intel/cannonlake: Install common i2cLijian Zhao
2017-11-04sb and soc: Enforce correct offset of member "chromeos" in global_nvs_tJonathan Neuschäfer
2017-11-01soc/intel/cannonlake: Use SCS common codeBora Guvendik
2017-10-27soc/intel/cannonlake: Use common p2sb driverLijian Zhao
2017-10-26soc/intel/cannonlake: Add support for C state and P stateShaunak Saha
2017-10-26soc/intel/cannonlake: remove duplicate power_state migrationPatrick Georgi
2017-10-23soc/intel/cannonlake: Increase stack size from 4KiB to 8KiBJohn Zhao
2017-10-22soc/intel/cannonlake: Change max root port to 16Lijian Zhao
2017-10-22security/vboot: Move vboot2 to security kconfig sectionPhilipp Deppenwiese
2017-10-20soc/intel/cannonlake: Add platform.aslLijian Zhao
2017-10-19soc/intel/cannonlake: Fix HECI error on resetLijian Zhao
2017-10-19soc/intel/cannonlake: Use EBDA structure to store soc reserve memory sizeSubrata Banik
2017-10-19soc/intel/cannonlake: Add IGD Support and pre-OS display codeAbhay Kumar
2017-10-18soc/intel/cannonlake: Set platform Debug Probe TypeLijian Zhao
2017-10-18soc/intel/cannonlake: Update PCIE CLKREQ programingLijian Zhao
2017-10-18soc/intel/cannonlake: Add finalize functionLijian Zhao