coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-12-14	soc/intel/cannonlake: Fix UART2 serial log broken issue	Subrata Banik
2017-12-13	src/soc/intel/cannonlake: Add _PRW for CNVi	Bora Guvendik
2017-12-11	soc/intel/cannonlake: Add support for D0 stepping	Lijian Zhao
2017-12-09	soc/intel/cannonlake: Clean up UART code	Aamir Bohra
2017-12-08	soc/intel/cannonlake: Add PCH ID support in bootblock/report_platform.c	Subrata Banik
2017-12-07	soc/intel/cannonlake: Make use of Intel common Graphics block	Subrata Banik
2017-12-05	soc/intel/cannonlake: Fix DSX_CFG macro name for AC_PRESENT	Furquan Shaikh
2017-12-02	soc/intel/cannonlake: Initialize PMC controller	Subrata Banik
2017-11-23	soc/intel/cannonlake: Add PM methods to power gate SD card controller	Vaibhav Shankar
2017-11-23	soc/intel/cannonlake: Invoke pmc and hard reset only if CSE fails to reset	John Zhao
2017-11-20	soc/intel/cannonlake: Add ACPI workaround for EMMC	Lijian Zhao
2017-11-17	soc/intel/cannonlake: fix gpio pin numbers	Bora Guvendik
2017-11-17	soc/intel/cannonlake: Add cpu.asl file	Shaunak Saha
2017-11-15	soc/intel/cannonlake: Fix and clean up xhci ACPI code	Vaibhav Shankar
2017-11-13	soc/intel/cannonlake: Define default LPSS clock	Lijian Zhao
2017-11-11	soc/intel/cannonlake: Make use of Intel SPI common block	Subrata Banik
2017-11-11	soc/intel/{cannonlake,skylake}: Add _soc_ prefix in spi soc routine	Subrata Banik
2017-11-10	soc/intel/cannonlake: Remove structure variable initialization with 0	Subrata Banik
2017-11-04	soc/intel/cannonlake: Add DSP support	Lijian Zhao
2017-11-04	soc/intel/cannonlake: Install common i2c	Lijian Zhao
2017-11-04	sb and soc: Enforce correct offset of member "chromeos" in global_nvs_t	Jonathan Neuschäfer
2017-11-01	soc/intel/cannonlake: Use SCS common code	Bora Guvendik
2017-10-27	soc/intel/cannonlake: Use common p2sb driver	Lijian Zhao
2017-10-26	soc/intel/cannonlake: Add support for C state and P state	Shaunak Saha
2017-10-26	soc/intel/cannonlake: remove duplicate power_state migration	Patrick Georgi
2017-10-23	soc/intel/cannonlake: Increase stack size from 4KiB to 8KiB	John Zhao
2017-10-22	soc/intel/cannonlake: Change max root port to 16	Lijian Zhao
2017-10-22	security/vboot: Move vboot2 to security kconfig section	Philipp Deppenwiese
2017-10-20	soc/intel/cannonlake: Add platform.asl	Lijian Zhao
2017-10-19	soc/intel/cannonlake: Fix HECI error on reset	Lijian Zhao
2017-10-19	soc/intel/cannonlake: Use EBDA structure to store soc reserve memory size	Subrata Banik
2017-10-19	soc/intel/cannonlake: Add IGD Support and pre-OS display code	Abhay Kumar
2017-10-18	soc/intel/cannonlake: Set platform Debug Probe Type	Lijian Zhao
2017-10-18	soc/intel/cannonlake: Update PCIE CLKREQ programing	Lijian Zhao
2017-10-18	soc/intel/cannonlake: Add finalize function	Lijian Zhao
2017-10-18	soc/intel/cannonlake: Calculate soc reserved memory size	Subrata Banik
2017-10-18	soc/intel/cannonlake: Use EBDA area to store cbmem_top address	Subrata Banik
2017-10-18	soc/intel/cannonlake: Refactor memory layout calculation	Subrata Banik
2017-10-18	soc/intel/cannonlake: Create acpi_get_sleep_type() to get previous sleep state	Subrata Banik
2017-10-12	soc/intel/common: Clean up PMC library GPE handling API	Furquan Shaikh
2017-10-12	soc/intel/cannonlake: add length information for communities	Bora Guvendik
2017-10-12	soc/intel/cannonlake: Add ACPI platform sleep capability	Vaibhav Shankar
2017-10-11	soc/intel/cannonlake: Change default UART number to 2	Lijian Zhao
2017-10-09	soc/intel/*lake: Load vbt when it's needed	Patrick Georgi
2017-10-06	soc/intel/common: refactor locate_vbt and vbt_get	Patrick Georgi
2017-10-06	soc/intel/cannonlake: Enable MRC cache	Lijian Zhao
2017-10-06	soc/intel/cannonlake: reduce bootblock size	Aaron Durbin
2017-10-05	soc/intel/cannonlake: Add all the SOC level DSDT tables	Lijian Zhao
2017-10-03	soc/intel/cannonlake: change gpio device name	Bora Guvendik
2017-10-03	soc/intel/cannonlake: Disable CPU ratio override	Lijian Zhao