summaryrefslogtreecommitdiff
path: root/src/soc/intel/cannonlake
AgeCommit message (Expand)Author
2019-07-13cpu/x86: Move smm_lock() prototypeKyösti Mälkki
2019-07-13soc/intel/cnl: Sync CONFIG_LPSS_UART_FOR_CONSOLE with FSPNico Huber
2019-07-12soc/intel/common: Add Coffee Lake H 6+2 Xeon graphics idNico Huber
2019-07-12soc/intel/common: Add CM246 LPC device idNico Huber
2019-07-11soc/intel/cannonlake: Add GPID and CGPM methods to GPIO ASLTim Wawrzynczak
2019-07-11soc/intel/cannonlake: Make EC S0ix notification optional in LPITTim Wawrzynczak
2019-07-11soc/intel/common/timer: Move USE_LEGACY_8254_TIMER into common/block/timerSubrata Banik
2019-07-10soc/intel: Remove invalid smm_relocate stubsKyösti Mälkki
2019-07-09arch/x86: Flip HAVE_MONOTONIC_TIMER defaultKyösti Mälkki
2019-07-09cpu/x86: Flip SMM_TSEG defaultKyösti Mälkki
2019-07-07soc/intel/{cannonlake,icelake}: Do not define PCH_DEV_PMC in ramstageFurquan Shaikh
2019-07-07soc/intel/cannonlake, mb/google/sarien: Get rid of unused dev paramFurquan Shaikh
2019-07-07soc/intel/cannonlake: Use SA_DEV_ROOT instead of PCH_DEV_PMCFurquan Shaikh
2019-07-06soc/intel/cannonlake: Fix outb orderJeremy Soller
2019-07-06soc/intel/cannonlake: Override PRERAM_CBMEM_CONSOLE_SIZE default valueSubrata Banik
2019-07-05soc/intel/cannonlake: Fix PMC and GPIO block values for PCH-HJeremy Soller
2019-07-04soc/intel: Replace uses of dev_find_slot()Kyösti Mälkki
2019-07-04arch/x86: Adjust size of postcar stackKyösti Mälkki
2019-07-02soc/intel/cannonlake: Add support to log XHCI wake eventsPaul Fagerburg
2019-07-01Use 3rdparty/intel-microcodeArthur Heymans
2019-06-28soc/intel/cannonlake: fix use of legacy 8254 timerMatt DeVillier
2019-06-26soc/intel/cannonlake/Kconfig: Don't have all variants select SOC_INTEL_CANNON...Arthur Heymans
2019-06-21soc/intel: Provide SPD manufacturer ID and module type to SMBIOSDuncan Laurie
2019-06-21soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASEArthur Heymans
2019-06-13soc/intel/{cml, whl}: Add option to skip HECI disable in SMMSubrata Banik
2019-06-12vendorcode/intel/fsp/fsp2_0/cometlake: Update FSP-M/S header files as per v1155Aamir Bohra
2019-06-07soc/intel/cannonlake: Add _DSM method for SD controllerV Sowmya
2019-06-06src/soc/intel/common/smbios: Add addtional infos to dimm_infoChristian Walter
2019-06-04soc/intel/cannonlake: Do not read SPD again if index hasn't changedFurquan Shaikh
2019-06-03soc/intel: Replace UART_BASE() and friends with a KconfigNico Huber
2019-06-03soc/intel/{skl,cnl,icl}: Drop soc_uart_set_legacy_mode()Nico Huber
2019-05-29src/soc: Add missing 'include <types.h>'Elyes HAOUAS
2019-05-28soc/intel/cannonlake: Dump ME status info before notify EndOfFirmwareBora Guvendik
2019-05-22post_code: add post code for hardware initialization failureKeith Short
2019-05-22soc/intel/cannonlake: Dump ME f/w version and status informationTim Wawrzynczak
2019-05-21soc/intel: Remove unused pointer argument in mca_configure()Subrata Banik
2019-05-20soc/intel/cannonlake: Configure SPI CS parameters in FSP UPD.Tim Wawrzynczak
2019-05-20soc/intel/cannonlake: Make use of gpio_pm_configure()Subrata Banik
2019-05-18soc/intel: Fill DIMM serial number from SPDDuncan Laurie
2019-05-15soc/intel/cannonlake: Support different SPD read type for each slotPhilip Chen
2019-05-13soc/intel/{cannonlake,icelake}: Drop unused cbmem.c fileElyes HAOUAS
2019-05-11soc/intel/cnl: Enable VT-dJohn Zhao
2019-05-09soc/intel/cannonlake: Fix pcie clock numberLijian Zhao
2019-05-07mb/google/sarien: Add SMBIOS type 9 fieldsLijian Zhao
2019-05-06soc/intel/cannonlake/acpi: Add board level s0ix call backEric Lai
2019-05-06soc/intel/cannonlake: Add GPIO dual-route support.Tim Wawrzynczak
2019-05-01mb/google/sarien: Disable S5 wake on LAN by defaultEric Lai
2019-04-30vboot: refactor OPROM codeJoel Kitching
2019-04-29soc/intel: Add GPI interrupt config register offset infoKarthikeyan Ramasubramanian
2019-04-29soc/intel/cannonlake: Modify dq_map to provide for 6 entriesPaul Fagerburg