coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2019-06-21	soc/intel: Provide SPD manufacturer ID and module type to SMBIOS	Duncan Laurie
2019-06-21	soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASE	Arthur Heymans
2019-06-13	soc/intel/{cml, whl}: Add option to skip HECI disable in SMM	Subrata Banik
2019-06-12	vendorcode/intel/fsp/fsp2_0/cometlake: Update FSP-M/S header files as per v1155	Aamir Bohra
2019-06-07	soc/intel/cannonlake: Add _DSM method for SD controller	V Sowmya
2019-06-06	src/soc/intel/common/smbios: Add addtional infos to dimm_info	Christian Walter
2019-06-04	soc/intel/cannonlake: Do not read SPD again if index hasn't changed	Furquan Shaikh
2019-06-03	soc/intel: Replace UART_BASE() and friends with a Kconfig	Nico Huber
2019-06-03	soc/intel/{skl,cnl,icl}: Drop soc_uart_set_legacy_mode()	Nico Huber
2019-05-29	src/soc: Add missing 'include <types.h>'	Elyes HAOUAS
2019-05-28	soc/intel/cannonlake: Dump ME status info before notify EndOfFirmware	Bora Guvendik
2019-05-22	post_code: add post code for hardware initialization failure	Keith Short
2019-05-22	soc/intel/cannonlake: Dump ME f/w version and status information	Tim Wawrzynczak
2019-05-21	soc/intel: Remove unused pointer argument in mca_configure()	Subrata Banik
2019-05-20	soc/intel/cannonlake: Configure SPI CS parameters in FSP UPD.	Tim Wawrzynczak
2019-05-20	soc/intel/cannonlake: Make use of gpio_pm_configure()	Subrata Banik
2019-05-18	soc/intel: Fill DIMM serial number from SPD	Duncan Laurie
2019-05-15	soc/intel/cannonlake: Support different SPD read type for each slot	Philip Chen
2019-05-13	soc/intel/{cannonlake,icelake}: Drop unused cbmem.c file	Elyes HAOUAS
2019-05-11	soc/intel/cnl: Enable VT-d	John Zhao
2019-05-09	soc/intel/cannonlake: Fix pcie clock number	Lijian Zhao
2019-05-07	mb/google/sarien: Add SMBIOS type 9 fields	Lijian Zhao
2019-05-06	soc/intel/cannonlake/acpi: Add board level s0ix call back	Eric Lai
2019-05-06	soc/intel/cannonlake: Add GPIO dual-route support.	Tim Wawrzynczak
2019-05-01	mb/google/sarien: Disable S5 wake on LAN by default	Eric Lai
2019-04-30	vboot: refactor OPROM code	Joel Kitching
2019-04-29	soc/intel: Add GPI interrupt config register offset info	Karthikeyan Ramasubramanian
2019-04-29	soc/intel/cannonlake: Modify dq_map to provide for 6 entries	Paul Fagerburg
2019-04-26	soc/{amd,intel}/chip: Use local include for chip.h	Elyes HAOUAS
2019-04-25	3rdparty/fsp: Update submodule pointer to upstream master	Matt DeVillier
2019-04-23	soc/intel/cannonlake: add missing console.h include	Patrick Georgi
2019-04-23	soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig	Kane Chen
2019-04-23	soc/intel/cannonlake: Add null reference check for Cnvi and Xdci	Aamir Bohra
2019-04-23	src: include <assert.h> when appropriate	Elyes HAOUAS
2019-04-23	src: Add missing include 'console.h'	Elyes HAOUAS
2019-04-22	Revert "soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML"	Lijian Zhao
2019-04-19	soc/intel/cannonlake: Add report for iGD 0x3ea1	Lijian Zhao
2019-04-18	soc/intel/cnl: Generate DMAR ACPI table	John Zhao
2019-04-16	soc/intel/cannonlake: Configure Vmx support using Kconfig	Ronak Kanabar
2019-04-16	soc/intel/cannonlake: Implement soc side VMX support	Ronak Kanabar
2019-04-16	soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML	Subrata Banik
2019-04-13	soc/intel/cpulib: Remove redundent enable/disable functions	Subrata Banik
2019-04-12	soc/intel/cannonlake: Select FSP_M_XIP	Furquan Shaikh
2019-04-12	soc/intel/cannonlake: Do not use XIP_ROM_SIZE	Furquan Shaikh
2019-04-11	soc/intel/cannonlake: Correct the GPE DWx mapping for GPIO groups	Aamir Bohra
2019-04-08	Replace remaining IS_ENABLED(CONFIG_*) with CONFIG()	Nico Huber
2019-04-08	src/soc/intel/cannonlake: Remove ITSS IPC restore	Aamir Bohra
2019-04-06	src: Use include <delay.h> when appropriate	Elyes HAOUAS
2019-04-06	src: Use #include <timer.h> when appropriate	Elyes HAOUAS
2019-04-01	soc/intel/cannonlake: Add FSP UPD to unlock GPIO pads in devicetree	Krishna Prasad Bhat