coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-09-14	soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode	Aamir Bohra
2020-08-27	soc/intel/common: Add Elkhart Lake B0 CPU ID	Tan, Lean Sheng
2020-08-06	soc/intel/common/block/cpu: Refactor init_cpus function	Subrata Banik
2020-08-05	soc/intel/common: Include Alder Lake device IDs	Subrata Banik
2020-07-26	src/soc/intel: Add include <types.h>	Elyes HAOUAS
2020-07-03	soc/intel/common: Only touch Time Window Tau bits in supported SoCs	Tim Wawrzynczak
2020-07-01	soc/intel/common/cpu: Don't set any TCC settings if offset is 0	Tim Wawrzynczak
2020-06-28	soc/intel/common: add TCC activation functionality	Sumeet R Pawnikar
2020-06-25	drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1	Jonathan Zhang
2020-06-15	arch/x86: Remove NO_FIXED_XIP_ROM_SIZE	Kyösti Mälkki
2020-06-06	src: Remove unused 'include <cpu/x86/mtrr.h>'	Elyes HAOUAS
2020-06-06	soc/intel/tigerlake: Add CPU ID for TGL B0	Jamie Ryu
2020-06-01	soc/intel/common/block: Remove unused headers	Angel Pons
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-06	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi
2020-05-06	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-05-01	src: Remove unused 'include <cpu/x86/cache.h>'	Elyes HAOUAS
2020-04-06	soc/intel/common: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2020-03-04	soc/intel/cpu: Select NO_FIXED_XIP_ROM_SIZE	Arthur Heymans
2020-02-25	soc/intel/common: Update Jasper Lake Device IDs	Meera Ravindranath
2020-02-04	soc/intel: Remove duplicate CPUID entry	Subrata Banik
2020-01-22	soc/intel/common: Add Elkhartlake Device IDs	Tan, Lean Sheng
2019-12-02	src/soc/intel: Add Cometlake-S and CMP-H skus	Gaggery Tsai
2019-11-15	soc/intel/common: Make alignment proper for comments	Subrata Banik
2019-11-12	arch/x86/car.ld: Rename suffix _start/_end	Arthur Heymans
2019-11-06	soc/intel/common: Make native and FSP-T CAR init mutually exclusive	Arthur Heymans
2019-11-05	soc/intel/common: Include Tigerlake device IDs	Ravi Sarawadi
2019-11-05	soc/intel/common: Don't link CAR teardown in romstage	Arthur Heymans
2019-11-04	soc/intel/sgx: convert SGX and PRMRR devicetree options to Kconfig	Michael Niewöhner
2019-10-31	soc/intel/common: add common function to set LT_LOCK_MEMORY	Michael Niewöhner
2019-09-29	soc/intel: Rename <intelblocks/chip.h>	Kyösti Mälkki
2019-09-11	arch/x86: Restrict use of _car_global[start\|end]	Kyösti Mälkki
2019-08-15	soc/*: mp_run_on_all_cpus: Remove configurable timeout	Patrick Rudolph
2019-08-12	soc/intel/common: Fix typo mistake in cache_as_ram.S	Subrata Banik
2019-07-30	soc/intel/cannonlake: Add new PCI IDs	Felix Singer
2019-07-17	soc/intel/cannonlake: Add device Ids for new CFL SKUs support	Lean Sheng Tan
2019-07-10	soc/intel/block/cpu: remove unused USE_COREBOOT_NATIVE_MP_INIT	Arthur Heymans
2019-05-21	soc/intel: Remove unused pointer argument in mca_configure()	Subrata Banik
2019-05-13	soc/intel: Geminilake Refresh feature request support	John Zhao
2019-04-23	src: Add missing include 'console.h'	Elyes HAOUAS
2019-04-21	cpu/x86: Move checking for MTRR's as a proxy for proper CPU reset	Arthur Heymans
2019-04-13	soc/intel/cpulib: Remove redundent enable/disable functions	Subrata Banik
2019-04-13	soc/intel/cpulib: Factor out IA32_PERF_CTL (0x199) MSR code	Subrata Banik
2019-04-06	src: Use include <delay.h> when appropriate	Elyes HAOUAS
2019-03-29	src: Use include <reset.h> when appropriate	Elyes HAOUAS
2019-03-24	soc/intel/common: Remove common chip config use_fsp_mp_init	Subrata Banik
2019-03-24	soc/intel/common: Add Kconfig option to choose desired MP Init for platform	Subrata Banik
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner