| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-07-02 | intel/block/cse: Add Cannon Lake SoC PCI device ID | Andrey Petrov | |
| Change-Id: Ida822d704b04cc4d1dfffb58003fc308bcb502d0 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/20064 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | |||
| 2017-03-09 | soc/intel/common/block: Add HECI driver | Andrey Petrov | |
| Add common driver that can send/receive HECI messages. This driver is inspired by Linux kernel mei driver and somewhat based on Skylake's. Currently it has been only tested on Apollolake. BUG=b:35586975 BRANCH=reef TEST=tested on Apollolake to send single messages and receive both fragmented and non-fragmented versions. Change-Id: Ie3772700270f4f333292b80d59f79555851780f7 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/18547 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) | |||
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index : coreboot | |
| Some coreboot project code with my work | vimacs |
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