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Add PCI IDs for Intel's Dynamic Tuning Technology (DTT) for ADL.
Also add NULL terminator at end of pci_device_ids.
Change-Id: If25b1f562567a833683b0b8796bd1d6cac0bd490
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45140
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This PCI ID is required in order for the CML devices to perform
SSDT generation for DPTF.
CML Processor, EDS, Vol 1,
Table 9-5, Section 9.2.
BUG=b:158986928
BRANCH=puff
TEST=builds
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Change-Id: I94aea6b9e0f60656827daada7b2cc2741604b8b3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44902
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sam McNally <sammc@google.com>
Reviewed-by: Daniel Kurtz <djkurtz@google.com>
Reviewed-by: Andrew McRae <amcrae@google.com>
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This PCI ID is required in order for JSL devices to perform SSDT
generation for DPTF.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I42209d15bc4f1654814465ce1412576f7349dddc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43421
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Intel Dynamic Tuning Technology is the name of a PCI device on some
Intel SoCs. This minimal PCI driver is only used now for SSDT generation
on TGL devices.
Change-Id: Ib52f35e4e020ca3e6ab8b32cc3bf7df36041926e
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41893
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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