coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-09-12	soc/intel/common/block/*/Kconfig: Guard options with if-blocks	Angel Pons
2020-09-12	include/console/uart: make index parameter unsigned	Felix Held
2020-09-09	soc/intel/common/block/uart/Kconfig: Drop unused symbols	Angel Pons
2020-08-18	soc/intel/common: Add support for LPSS UART in ACPI mode	Patrick Rudolph
2020-08-05	soc/intel/common: Include Alder Lake device IDs	Subrata Banik
2020-06-30	ACPI: Drop typedef global_nvs_t	Kyösti Mälkki
2020-06-24	ACPI: Replace uses of CBMEM_ID_ACPI_GNVS	Kyösti Mälkki
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-05-01	soc/intel/common: Fix 16-bit read/write PCI_COMMAND register	Elyes HAOUAS
2020-04-06	soc/intel/common: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2020-02-25	soc/intel/common: Update Jasper Lake Device IDs	Meera Ravindranath
2020-01-22	soc/intel/common: Add Elkhartlake Device IDs	Tan, Lean Sheng
2019-12-13	soc/intel/common: Add PCI device IDs for CMP-H	Gaggery Tsai
2019-12-10	soc/intel/common: Add Jasperlake Device IDs	rkanabar
2019-11-05	soc/intel/common: Include Tigerlake device IDs	Ravi Sarawadi
2019-08-21	soc/intel/common: Set controller state to active in uart init	Usha P
2019-08-04	soc/intel/common/block/uart: Update the UART PCI device reference	Aamir Bohra
2019-07-29	Revert "soc/intel/common: Set controller state to active in uart init"	Christian Walter
2019-07-24	soc/intel/common: Set controller state to active in uart init	Usha P
2019-06-03	soc/intel: Replace UART_BASE() and friends with a Kconfig	Nico Huber
2019-06-03	soc/intel/common/uart: Correctly guard uart_platform_base()	Nico Huber
2019-06-03	soc/intel/common/uart: Only return valid UART base	Nico Huber
2019-06-03	soc/intel/common/uart: Drop dead call to soc_uart_set_legacy_mode()	Nico Huber
2019-04-23	src: include <assert.h> when appropriate	Elyes HAOUAS
2019-03-20	src: Use 'include <string.h>' when appropriate	Elyes HAOUAS
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2019-02-26	soc/intel/common: Include cometlake PCH IDs	Ronak Kanabar
2019-01-23	soc/{amd,intel}: Remove needless '&' on function pointers	Elyes HAOUAS
2019-01-09	soc/intel: Clean mess around UART_DEBUG	Nico Huber
2018-11-07	soc/intel/common: Include Icelake device IDs	Aamir Bohra
2018-10-17	soc/intel/cannonlake: Add new cannon lake PCH-H support	praveen hodagatta pranesh
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-08-20	soc/intel/common/block: Move common uart function to block/uart	Subrata Banik
2018-06-14	src: Get rid of device_t	Elyes HAOUAS
2018-04-24	compiler.h: add __weak macro	Aaron Durbin
2018-02-20	src/soc: Fix various typos	Jonathan Neuschäfer
2018-02-07	soc/intel/skylake: Add Kabylake PCH H device ID's	V Sowmya
2018-01-25	soc/intel/skylake: Clean up the skylake PCH H device ID macros	V Sowmya
2017-12-13	soc/intel/common/block: Add option to have subsystem_id in common pci driver	Subrata Banik
2017-08-10	soc/intel/common/uart: Add support for enabling UART debug controller on resume	Furquan Shaikh
2017-08-10	soc/intel/common/uart: Refactor uart_common_init	Furquan Shaikh
2017-08-04	soc/intel/common: Add Cannonlake pci ids for common	Lijian Zhao
2017-07-24	Update files with no newline at the end	Martin Roth
2017-05-22	soc/intel/common/block/uart: Add GLK UART pci ids	Hannah Williams
2017-05-09	soc/intel/common: Add PCI configuration code for UART	Aamir Bohra
2017-04-11	soc/intel/common/block: Add Intel common UART code	Aamir Bohra