coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-09-21	soc/intel: Refactor do_global_reset() function	Subrata Banik
2020-09-21	soc/intel: rename get_prmrr_size	Michael Niewöhner
2020-09-21	soc/intel/common/block/sgx: drop no-ops from PRMRR Kconfig	Michael Niewöhner
2020-09-21	soc/intel/common/block/sgx: make PRMRR size setting depend on SGX	Michael Niewöhner
2020-09-21	soc/intel/common/cse_lite: Defer cse_fw_sync for JSL	Karthikeyan Ramasubramanian
2020-09-19	soc/intel/common/block/cse: Refactor cse_request_global_reset() function	Subrata Banik
2020-09-17	soc/intel/common/block/chip: Refactor chip_get_common_soc_structure()	Subrata Banik
2020-09-17	soc/intel/common/block: Add NULL check for 'ctx' pointer	Subrata Banik
2020-09-16	soc/intel/common/block: Do not die if PRMRR size unsupported	Angel Pons
2020-09-15	soc/intel/common/block/cpu: Fix boot failure	Patrick Rudolph
2020-09-15	common/block/pmc: Add a check to program the PchPmPwrCycDur	V Sowmya
2020-09-14	soc/intel/common/block: Use pci_dev_request_bus_master for BM enabling	Subrata Banik
2020-09-14	soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode	Aamir Bohra
2020-09-12	soc/intel/common/block/*/Kconfig: Guard options with if-blocks	Angel Pons
2020-09-12	include/console/uart: make index parameter unsigned	Felix Held
2020-09-09	soc/intel/common/block/imc: Drop unused code	Angel Pons
2020-09-09	soc/intel/common/block/uart/Kconfig: Drop unused symbols	Angel Pons
2020-09-08	pci_ids: Add Alder Lake DTT PCI IDs	Subrata Banik
2020-09-08	pci_ids: Add Alder Lake IPU PCI IDs	Subrata Banik
2020-09-08	soc/intel/common: Add SMRR Lock Supported bit definition for MTRR_CAP	Tim Wawrzynczak
2020-08-29	PCI IDs: Add PCI ID for CML DPTF/DTT PCI device	Edward O'Callaghan
2020-08-27	soc/intel/common: Include Elkhart Lake SA IDs	Tan, Lean Sheng
2020-08-27	soc/intel/common: Add Elkhart Lake B0 CPU ID	Tan, Lean Sheng
2020-08-24	soc/intel/common: Add downgrade support for CSE Firmware	Sridhar Siricilla
2020-08-21	SMM: Validate more user-provided pointers	Patrick Rudolph
2020-08-20	cse_lite: Move global reset after MRC writeback	Caveh Jalali
2020-08-18	src: Remove unused 'include <delay.h>'	Elyes HAOUAS
2020-08-18	src: Remove unused 'include <lib.h>'	Elyes HAOUAS
2020-08-18	soc/intel/common/block/pmc/pmclib.c: Remove unused '<pc80/mc146818rtc.h>'	Elyes HAOUAS
2020-08-18	soc/intel/common: Add support for LPSS UART in ACPI mode	Patrick Rudolph
2020-08-17	{soc/intel/common,sb/intel/lynxpoint}/hda_verb.c: Reduce differences	Elyes HAOUAS
2020-08-17	soc/intel/common: Move common HDA registers to <device/azalia_device.h>	Elyes HAOUAS
2020-08-17	soc/intel/jasperlake: Add IGD Device ID	Krishna Prasad Bhat
2020-08-14	soc/intel/common/cse_lite: Perform a board specific reset	Karthikeyan Ramasubramanian
2020-08-13	soc/intel/common/block: Stitch CSE blobs into FW_MAIN_X partitions	Sridhar Siricilla
2020-08-12	soc/intel/common/block/sata: Add common SATA driver	Subrata Banik
2020-08-11	soc/intel/common/block/gspi: Recalculate BAR after resource allocation	Jes Klinke
2020-08-07	soc/intel/common: Log CSE FW Status Registers before triggering recovery	Sridhar Siricilla
2020-08-06	soc/intel/common/block/cpu: Refactor init_cpus function	Subrata Banik
2020-08-05	src/soc/intel/common: Make top_of_ram till TOLUD region mmio_resource	Subrata Banik
2020-08-05	soc/intel/common: Include Alder Lake device IDs	Subrata Banik
2020-08-03	Change all assert(0) to BUG()	Julius Werner
2020-07-30	smbios: Fix type 17 for Windows 10	Patrick Rudolph
2020-07-28	src: Never set ISA Enable on PCI bridges	Angel Pons
2020-07-26	soc/intel/common/basecode: Implement CSE update flow	Rizwan Qureshi
2020-07-26	src/soc/intel: Add include <types.h>	Elyes HAOUAS
2020-07-26	soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG	Maxim Polyakov
2020-07-26	soc/intel/common/hda: Add HDA ID for Jasper Lake	yan.liu
2020-07-26	src: Change BOOL CONFIG_ to CONFIG() in comments & strings	Martin Roth
2020-07-25	soc/intel/tigerlake: Update Tiger Lake SA IDs	Derek Huang