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Some coreboot project code with my work
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southcluster.c
Age
Commit message (
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Author
2019-05-22
post_code: add post code for hardware initialization failure
Keith Short
2019-05-13
{bd82x6x,i82801gx,ibexpeak,lynxpoint}: Remove dead code and use macro
Elyes HAOUAS
2019-03-12
src: Drop unused 'include <arch/acpigen.h>'
Elyes HAOUAS
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-03-04
device/mmio.h: Add include file for MMIO ops
Kyösti Mälkki
2019-03-01
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2018-12-18
soc: Remove unneeded include <pc80/mc146818rtc.h>
Elyes HAOUAS
2018-11-16
src: Remove unneeded include <cbmem.h>
Elyes HAOUAS
2018-11-12
src: Remove unneeded include "{arch,cpu}/cpu.h"
Elyes HAOUAS
2018-06-04
soc/intel/fsp_baytrail: Get rid of device_t
Elyes HAOUAS
2016-08-31
src/soc: Add required space before opening parenthesis '('
Elyes HAOUAS
2016-08-28
src/soc: Remove unnecessary whitespace before "\n" and "\t"
Elyes HAOUAS
2015-12-17
soc/intel/fsp_baytrail: Adjust root port INT routing
Martin Roth
2015-12-16
intel/fsp_baytrail: rename include folder baytrail to include/soc
Ben Gardner
2015-12-06
Remove #ifdef checks on Kconfig symbols
Martin Roth
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-06-04
devicetree: Discriminate device ops scan_bus()
Kyösti Mälkki
2015-05-23
baytrail: Switch to per-device ACPI
Vladimir Serbinenko
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-03-10
ACPI: Get S3 resume state from romstage_handoff
Kyösti Mälkki
2015-02-27
x86: Fix pointer arithmetic regressions from MMIO changes
Kevin Paul Herbert
2015-02-15
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
Kevin Paul Herbert
2014-12-05
fsp_baytrail: Update function disable code
Martin Roth
2014-05-29
fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip
Martin Roth