coreboot - Some coreboot project code with my work

Age	Commit message (Collapse)	Author
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
	PCI config accessors are no longer indirectly included from <arch/io.h> use <device/pci_ops.h> instead. Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31675 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-01-10	soc/intel/fsp_broadwell_de/vtd: Silence warning	Patrick Rudolph
	Silence PCI resource warning due to missing set_resources. Change-Id: I8253e9ca137bda1cdd1c06273679693c4b7803ec Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/30743 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-09-20	soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resources	Werner Zeh
	FSP initializes the VT-d feature on Broadwell-DE and assigns an address space to the MMIO range. coreboot's resource allocator needs to be aware of this fixed resource as otherwise the address can be assigned to a different PCI device. In this case addresses are overlapped and the VT-d range is not accessible any more. To deal with it the right way add a fixed MMIO resource to the resources list if VT-d BAR is enabled. TEST=Booted into Linux and checked coreboot log for resource assignment. Change-Id: I626ac17420eadc0b49031e850f0f40b3b221a098 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/28672 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-20	fsp_broadwell_de: Move DMAR table generation to corresponding VT-d device	Werner Zeh
	The DMAR table generation depends on the VT-d feature which is implemented in its own PCI device located in PCI:00:05.0 for Broadwell-DE. Add a new PCI driver for this device and move DMAR table generation to this device driver. Change-Id: I103257c73f5e745e996a441a2535b885270bc204 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/28671 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>