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path: root/src/soc/intel/fsp_broadwell_de
AgeCommit message (Expand)Author
2016-10-09soc/intel/fsp_broadwell_de: Fix system hang when timestamp is enabledYork Yang
2016-10-09soc/intel/fsp_broadwell_de: Remove the enforced fsp1.0 APIs call sequenceYork Yang
2016-09-30soc/intel/fsp_broadwell_de/uart: Drop itNico Huber
2016-09-13fsp_broadwell_de: Add Kconfig switch for SERIRQ operation modeWerner Zeh
2016-09-12siemens/mc_bdx1: Enable decoding for COM 3 & COM 4 on LPCWerner Zeh
2016-09-12fsp_broadwell_de: Correct access to SIRQ_CNTL registerWerner Zeh
2016-09-08fsp_broadwell_de: Adjust printed address in SPI debug messagesWerner Zeh
2016-08-30fsp_broadwell_de: Refactor code for SPI debug messagesWerner Zeh
2016-08-11fsp_Broadwell_DE: Do not set IRQ3 and IRQ4 to levelKevin Paul Herbert
2016-08-03fsp_broadwell_de: Add DMAR table to ACPIWerner Zeh
2016-08-01Remove non-ascii & unprintable charactersMartin Roth
2016-08-01Add newlines at the end of all coreboot filesMartin Roth
2016-07-31src/soc: Capitalize CPU, ACPI, RAM and ROMElyes HAOUAS
2016-07-15soc/intel/fsp_broadwell_de: use common Intel ACPI hardware definitionsAaron Durbin
2016-07-14fsp_broadwell_de: Add SMBus driver for ramstageWerner Zeh
2016-07-07intel/fsp_broadwell_de: Do not use hard coded SCI IRQ for ACPIWerner Zeh
2016-07-06PCI: Use PCI_DEVFN macro instead of DEV_FUNCWerner Zeh
2016-06-30fsp_broadwell_de: Enable Super I/O address range decodeWerner Zeh
2016-06-29intel romstage: Use run_ramstage()Kyösti Mälkki
2016-05-06soc/intel/fsp_broadwell_de: convert to using common MP initAaron Durbin
2016-05-02cpu/x86/mp_init: remove unused callback argumentsAaron Durbin
2016-04-20intel/fsp_broadwell_de: fix SPD CBFS file typeStef van Os
2016-04-17broadwell_de_fsp: Select HAVE_INTEL_FIRMWAREWerner Zeh
2016-04-14soc/intel: Add Broadwell-DE SoC supportYork Yang