coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-01	soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understa...	Subrata Banik
2020-05-01	soc/intel/jasperlake: Fill PcieRpClkReqDetect from devicetree	Meera Ravindranath
2020-04-06	soc/intel/jasperlake: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-28	soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake	Aamir Bohra
2020-03-28	soc/intel/jasperlake: Add Jasper Lake SoC support	Aamir Bohra