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Some coreboot project code with my work
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fsp_params.c
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Commit message (
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Author
2020-10-26
Revert "soc/intel/jasperlake: Allow mainboard to override chip configuration"
Karthikeyan Ramasubramanian
2020-10-12
soc/intel: Configure PAVP at compile-time
Benjamin Doron
2020-10-12
soc/intel/jasperlake: Allow mainboard to override chip configuration
Karthikeyan Ramasubramanian
2020-10-08
soc/intel/jasperlake: Add VR Configuration settings
Meera Ravindranath
2020-10-08
Revert "soc/intel/jasperlake: Disable PAVP UPD"
Nico Huber
2020-09-22
soc/intel/jasperlake: Enable processor thermal control using PCI_DEVFN
Sumeet R Pawnikar
2020-09-21
soc/intel/jsl: Use the common code to set the PchPmPwrCycDur
V Sowmya
2020-09-06
soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default
Michael Niewöhner
2020-08-25
soc/intel/jasperlake: Disable multiphase SI init
Ronak Kanabar
2020-08-17
soc/intel/jasperlake: Add FSP UPDs for minimum assertion widths
V Sowmya
2020-08-01
soc/intel/{icl,jsl,tgl}: Remove SkipMpInit UPD as deprecated
Subrata Banik
2020-07-28
soc/intel/jasperlake: Simplify is-device-enabled checks
Felix Singer
2020-07-26
src: Update bare access to BOOL CONFIG_ vals to CONFIG()
Martin Roth
2020-06-30
jasperlake: enable tcc_offset functionality
Sumeet R Pawnikar
2020-05-28
soc/intel/jasperlake: Disable PAVP UPD
Ronak Kanabar
2020-05-28
soc/intel/jasperlake: Use coreboot lock down config
Aamir Bohra
2020-05-12
soc/intel/jasperlake: Add SATA related UPDs configuration
Ronak Kanabar
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
soc/intel/jasperlake: Enable end of post support in FSP
Aamir Bohra
2020-05-05
soc/intel/jasperlake: Allow SD card power enable polarity configuration
Ronak Kanabar
2020-05-01
soc/intel/jasperlake: Fill PcieRpClkReqDetect from devicetree
Meera Ravindranath
2020-04-06
soc/intel/jasperlake: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-28
soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper Lake
Aamir Bohra