summaryrefslogtreecommitdiff
path: root/src/soc/intel/quark
AgeCommit message (Expand)Author
2017-03-07soc/intel/quark: Fix errors detected by checkpatchLee Leahy
2017-03-07soc/intel/quark: Fix I2C driverLee Leahy
2017-01-16intel: Fix copy/paste error in license textMarshall Dawson
2017-01-04soc/intel/quark: Add monotonic timer supportLee Leahy
2017-01-03soc/intel/quark: Add early debugging codeLee Leahy
2017-01-03soc/intel/quark: Fix serial port configurationLee Leahy
2016-12-01romstage_handoff: add helper to determine resume statusAaron Durbin
2016-11-30driver/intel/fsp2_0: Add version parameter to FSP platform callbackAndrey Petrov
2016-11-21fsp2_0: implement stage cache for silicon initBrandon Breitenstein
2016-09-30soc/intel/quark: Fix FSP 2.0 buildLee Leahy
2016-09-30soc/intel/quark: Support multiple version of FSPLee Leahy
2016-09-30mainboard/intel/quark: Add FSP selection valuesLee Leahy
2016-08-31src/soc: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-15intel/quark: Fix assert checkFurquan Shaikh
2016-08-10soc/intel/quark: Switch to using serial routines for FSPLee Leahy
2016-08-05soc/intel/quark: Add missing breaksLee Leahy
2016-08-05soc/intel/quark: Add bootblock_c_entryLee Leahy
2016-08-05soc/intel/quark: Clean up debug output levelsLee Leahy
2016-08-05soc/intel/quark: Disable FSP serial outputLee Leahy
2016-08-05soc/intel/quark: Add FSP 2.0 romstage supportLee Leahy
2016-08-05soc/intel/quark: Add FSP 2.0 boot block supportLee Leahy
2016-08-03soc/intel/quark: Support access to CPU CR registersLee Leahy
2016-08-03soc/intel/quark: Add header files for FSP 2.0Lee Leahy
2016-08-03soc/intel/quark: Prepare for FSP2.0 supportLee Leahy
2016-08-03soc/intel/quark: Initialize MTRRs in bootblockLee Leahy
2016-08-03soc/intel/quark: Remove use of EDK-II macros and data typesLee Leahy
2016-08-03soc/intel/quark: Make ramstage relocatableLee Leahy
2016-08-01soc/intel/quark: Enable use of hard resetLee Leahy
2016-08-01soc/intel/quark: Fix car_stage_entry routine name.Lee Leahy
2016-07-31src/soc: Capitalize CPU, ACPI, RAM and ROMElyes HAOUAS
2016-07-31Remove extra newlines from the end of all coreboot files.Martin Roth
2016-07-27cpu/x86: Support CPUs without rdmsr/wrmsr instructionsLee Leahy
2016-07-20soc/intel/quark: Fix legacy GPIO readsLee Leahy
2016-07-15soc/intel/quark: use common Intel ACPI hardware definitionsAaron Durbin
2016-07-14soc/intel/quark/bootblock: Remove clear_smi_and_wake_eventsJonathan Neuschäfer
2016-07-12soc/intel/quark: Set CBMEM top from HW registerLee Leahy
2016-07-12soc/intel/quark: Add host bridge access supportLee Leahy
2016-07-08soc/intel/quark: Pass in the memory initialization parametersLee Leahy
2016-07-08soc/intel/quark: Remove use of PDAT.bin fileLee Leahy
2016-07-06PCI: Use PCI_DEVFN macro instead of DEV_FUNCWerner Zeh
2016-06-12soc/intel/quark: Add C bootblockLee Leahy
2016-06-09soc/intel/quark: Pass serial port address to FSPLee Leahy
2016-05-31quark: Enable HSUART0 as consoleLee Leahy
2016-05-31soc/intel/quark: Move UART init into romstage.cLee Leahy
2016-05-31soc/intel/quark: Split I2C out from driverLee Leahy
2016-05-31soc/intel/quark: Set temporary I2C base addressLee Leahy
2016-05-31soc/intel/quark: Conditionally define BIT namesLee Leahy
2016-05-31soc/intel/quark: Fix reg_script displayLee Leahy
2016-05-31soc/intel/quark: Clear SMI interrupts and wake eventsLee Leahy
2016-05-31soc/intel/quark: Rename pmc.c to lpc.cLee Leahy