index
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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
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refs
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tree
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path:
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src
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soc
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intel
/
skylake
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Makefile.inc
Age
Commit message (
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Author
2016-01-18
intel/skylake: provide default VR configuration
Aaron Durbin
2016-01-17
intel/skylake: During RO mode after FSP reset CB lose original state
Subrata Banik
2016-01-15
intel/skylake: add nhlt support
Aaron Durbin
2015-12-16
intel/skylake: Work around ROMCC optimization bug
Stefan Reinauer
2015-12-04
braswell/skylake: Add FspUpdVpd.h to fix compilation
Stefan Reinauer
2015-10-11
skylake: add support for verstage
Aaron Durbin
2015-09-30
cpu: microcode: Use microcode stored in binary format
Alexandru Gagniuc
2015-09-29
skylake: select HAVE_INTEL_FIRMWARE
Aaron Durbin
2015-09-10
fsp1_1: provide binding to UEFI version
Aaron Durbin
2015-09-09
x86: bootblock: remove linking and program flow from build system
Aaron Durbin
2015-09-08
skylake: allow timer_monotonic_get() in all stages
Aaron Durbin
2015-08-29
intel/skylake: Implemented generic SPI driver for ROM/RAMSTAGE access.
Subrata
2015-08-28
soc/*/Makefile.inc: Do not add soc/common as a subdir
Alexandru Gagniuc
2015-08-13
skylake: fix serial port with new code base
Aaron Durbin
2015-07-16
soc/intel: Add Skylake SOC support
Lee Leahy
2015-07-16
soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC
Lee Leahy