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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
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hp9480m
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Some coreboot project code with my work
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intel
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skylake
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chip.h
Age
Commit message (
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Author
2017-04-13
soc/intel/skylake: Split AC/DC settings for Deep Sx config
Duncan Laurie
2017-04-06
soc/intel/skylake: Add support for GSPI controller
Furquan Shaikh
2017-03-23
soc/intel/skylake: Add SGX initialization
Robbie Zhang
2017-03-22
soc/intel/skylake: Add option to disable host reads to PMC XRAM
Rizwan Qureshi
2017-03-22
soc/intel/skylake: Add configs for enabling DCI and TraceHub
Aamir Bohra
2017-03-17
soc/intel/skylake: Wrap lines at 80 columns
Lee Leahy
2017-03-17
soc/intel/skylake: Add int to unsigned
Lee Leahy
2017-03-08
intel/skylake: Add devicetree settings for acoustic noise mitigation
Duncan Laurie
2017-03-04
soc/intel/skylake: indicate voltage margining enabled/disabled
Rizwan Qureshi
2017-02-23
soc/intel/skylake: Enable Systemagent IMGU
Rizwan Qureshi
2017-02-18
soc/intel/skylake: add PrmrrSize to chip config
Robbie Zhang
2016-11-11
soc/intel/common/lpss_i2c: simplify API and use common config structure
Aaron Durbin
2016-11-11
soc/intel/skylake: move i2c voltage config to own variable
Aaron Durbin
2016-11-09
soc/intel/skylake: fix memory access beyond array bounds
Rizwan Qureshi
2016-10-26
intel/skylake: Add support to enable wake-on-usb attach/detach
Furquan Shaikh
2016-09-19
soc/intel/skylake: Add FSP 2.0 support in ramstage
Naresh G Solanki
2016-09-15
soc/intel/skylake: Add FSP 2.0 support in romstage
Barnali Sarkar
2016-08-08
skylake/devicetree: Add PIRQ Routing programming
Barnali Sarkar
2016-07-01
skylake: Generate ACPI timing values for I2C devices
Duncan Laurie
2016-06-09
skylake: Support common LPSS I2C driver
Duncan Laurie
2016-06-09
skylake: Move I2C bus configuration to separate structure
Duncan Laurie
2016-05-31
skylake: Add SD card device to configure card detect GPIO
Duncan Laurie
2016-05-31
skylake: Add GPE header file to chip.h
Duncan Laurie
2016-05-09
soc/intel/skylake: Enable another VR mailbox command for certain boards
Subrata Banik
2016-03-12
soc/intel/skylake: add option to statically clock gate 8254 timer
Aaron Durbin
2016-03-12
soc/intel/skylake: add option to enable VR specific mailbox cmd
Rizwan Qureshi
2016-03-01
Skylake: Support Intel Speed Shift Technology based on config
Subrata Banik
2016-02-04
intel/skylake: disable ACPI PM Timer to enable XTAL OSC shutdown
Archana Patni
2016-01-22
intel/skylake: Thermal Design Power PL1 and PL2 Config Changes
pchandri
2016-01-19
intel/skylake: Adding provision to set voltages to the I2C ports
Naresh G Solanki
2016-01-18
intel/skylake: Change in UPD name from SkipMpInit to FspSkipMpInit
Barnali Sarkar
2016-01-18
intel/skylake: Remove unused devicetree configuration variables
Duncan Laurie
2016-01-18
intel/skylake: Add devicetree setting for DDR frequency limit UPD
Duncan Laurie
2016-01-17
intel/skylake: disable heci1 if psf is unlocked
Archana Patni
2016-01-16
intel/skylake: Add VrConfig UPD parameters from coreboot
Rizwan Qureshi
2016-01-16
intel/skylake: Enable SkipMpInit token
Rizwan Qureshi
2016-01-15
intel/skylake: More UPD params are added for PCH policy in FSP
Rizwan Qureshi
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-27
intel/skylake: Clean up USB configuration in devicetree
Duncan Laurie
2015-10-27
intel/skylake: IRQ programming through UPD
Subrata Banik
2015-10-27
intel/skylake: FSP 1.7.0 MemoryInit/SiliconInit params update
Rizwan Qureshi
2015-09-17
intel/skylake: Create "RtcLock" Silicon UPD from coreboot
Barnali Sarkar
2015-09-10
skylake: Enable DPTF based on devicetree setting
Duncan Laurie
2015-09-08
skylake: Clean up chip.h
Duncan Laurie
2015-08-19
skylake: Update Memory and Silicon Init params
Rizwan Qureshi
2015-08-14
skylake: remove ec_smi_gpio and alt_gp_smi_en
Aaron Durbin
2015-08-14
skylake: provide GPE0 routing devicetree configuration
Aaron Durbin
2015-08-14
skylake: remove IedSize from chip.h
Aaron Durbin
2015-08-13
skylake: Add Deep Sx configuration for wake pins
Duncan Laurie
2015-07-21
skylake: Show SPI controller if enabled in devicetree.cb
Duncan Laurie
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