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path: root/src/soc/intel/skylake/cpu.c
AgeCommit message (Expand)Author
2017-09-15soc/intel/common/sgx: Define and use soc_fill_sgx_param()Pratik Prajapati
2017-09-11cpu/x86/mp_init: remove adjust_cpu_apic_entry()Aaron Durbin
2017-09-02soc/intel/skylake: Use common mca_configure() APIPratik Prajapati
2017-08-21soc/intel/skylake: Fix SGX init sequencePratik Prajapati
2017-08-21intel/common/mp_init: Refactor MP Init code to get rid of microcode paramPratik Prajapati
2017-08-21intel/common/sgx: Use intel_mp_current_microcode() to get microcode pointerPratik Prajapati
2017-07-14soc/intel/skylake: Set PsysPL2 MSRShelley Chen
2017-07-10sgx: Move SGX code to intel/common/blockPratik Prajapati
2017-06-23soc/intel/skylake: Remove post SMM Relocation uCode loadingBarnali Sarkar
2017-06-23soc/intel/skylake: Use CPU MP Init Common codeBarnali Sarkar
2017-06-09soc/intel/skylake: Enable ACPI PM timer emulation on all CPUsSubrata Banik
2017-06-09soc/intel/skylake: Use CPU common library codeBarnali Sarkar
2017-06-09soc/intel/skylake: Move update microcode from cbfs to mp_ops callbacksBarnali Sarkar
2017-06-09soc/intel/skylake: Cache the MMIO BIOS regionAaron Durbin
2017-06-07src: change coreboot to lowercaseMartin Roth
2017-06-05soc/intel/skylake: Add config for cpu base clock frequencyAamir Bohra
2017-05-16soc/intel/skylake: Add option to enable/disable EISTSubrata Banik
2017-05-16soc/intel/skylake: Configure C-state interrupt response timeSubrata Banik
2017-05-08soc/intel/skylake: Enable MTRR checkFurquan Shaikh
2017-04-24soc/intel/skylake: Add ID's for Kabylake-RNaresh G Solanki
2017-03-23soc/intel/skylake: Add SGX initializationRobbie Zhang
2017-03-17soc/intel/skylake: Fix remaining issues detected by checkpatchLee Leahy
2017-03-17soc/intel/skylake: Wrap lines at 80 columnsLee Leahy
2017-03-17soc/intel/skylake: Add int to unsignedLee Leahy
2017-03-06soc/intel/skylake: Clean up CPU codeSubrata Banik
2017-02-22soc/intel/skylake: Fix broken suspend-resumeFurquan Shaikh
2017-02-17intel/skylake: add function is_secondary_thread()Robbie Zhang
2017-02-16soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO...Sooi, Li Cheng
2017-02-14soc/intel/skylake: Perform CPU MP Init before FSP-S InitSubrata Banik
2016-12-26soc/intel/skylake: set TCC activation by BSP onlySumeet Pawnikar
2016-11-14skylake: Update the thermal time window for throttling actionSumeet Pawnikar
2016-08-06soc/intel/skylake: Add Kabylake device IdsRizwan Qureshi
2016-07-31src/soc: Capitalize CPU, ACPI, RAM and ROMElyes HAOUAS
2016-05-06soc/intel/skylake: convert to using common MP and SMM initAaron Durbin
2016-05-02cpu/x86/mp_init: remove unused callback argumentsAaron Durbin
2016-03-29intel/skylake: Enable PROCHOTPratik Prajapati
2016-03-08x86 chipsets: utilize x86_setup_mtrrs_with_detect()Aaron Durbin
2016-03-01Skylake: Support Intel Speed Shift Technology based on configSubrata Banik
2016-01-22intel/skylake: Thermal Design Power PL1 and PL2 Config Changespchandri
2015-11-05skylake: Set Pkg Power clamping bit in Power Limit MSRRizwan Qureshi
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-10-11Skylake: remove the out-dated VR config and un-needed 24mhz calibrationrobbie zhang
2015-08-27skylake: only generate ACPI cpu entries onceAaron Durbin
2015-07-29skylake: Update microcode reload in ramstage.Rizwan Qureshi
2015-07-16soc/intel: Add Skylake SOC supportLee Leahy
2015-07-16soc/intel/skylake: Use Broadwell as comparision base for Skylake SOCLee Leahy