coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-02-16	soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO...	Sooi, Li Cheng
2016-09-19	soc/intel/skylake: Add FSP 2.0 support in ramstage	Naresh G Solanki
2016-08-31	skylake: Add initial FSP2.0 support	Rizwan Qureshi
2016-08-30	soc/intel/skylake: Include Kabylake specific IGD Device IDs	Barnali Sarkar
2016-07-28	bootmode: Get rid of CONFIG_BOOTMODE_STRAPS	Furquan Shaikh
2016-07-28	vboot: Separate vboot from chromeos	Furquan Shaikh
2016-02-15	skylake: Enable DDI-A 4-lane support if GOP does not execute	Duncan Laurie
2016-01-19	intel/skylake: Fix issues found by klockwork	Naresh G Solanki
2015-12-15	x86 acpi: remove ALIGN_CURRENT macro	Aaron Durbin
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-27	intel/skylake: Add support for Gfx PEIM (AKA GOP)	robbie zhang
2015-09-08	skylake: igd: clean up igd.c	Duncan Laurie
2015-07-16	soc/intel: Add Skylake SOC support	Lee Leahy
2015-07-16	soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC	Lee Leahy