coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-08-21	soc/intel/skylake: Add support for all UART port index	Subrata Banik
2017-08-19	soc/intel/skylake: Enable power button SMI when jumping to payload	Furquan Shaikh
2017-08-15	soc/intel/{cannonlake,skylake}: fix PCH_P2SB_EPMASK macro	Aaron Durbin
2017-08-10	soc/intel/skylake: Enable UART debug controller on S3 resume	Furquan Shaikh
2017-07-24	soc/intel/skylake: Use common opregion implementation	Patrick Rudolph
2017-07-21	soc/intel/skylake: Rectify LPC Lock Enable (LE) bit definition	Subrata Banik
2017-07-17	soc/intel/skylake: remove top_of_32bit_ram() declaration	Aaron Durbin
2017-07-14	soc/intel/skylake: Set PsysPL2 MSR	Shelley Chen
2017-07-13	Rename __attribute__((packed)) --> __packed	Stefan Reinauer
2017-07-10	sgx: Move SGX code to intel/common/block	Pratik Prajapati
2017-07-01	soc/intel/skylake: Remove unnecessary P-State and Flex Ratio assignment	Barnali Sarkar
2017-06-23	soc/intel/skylake: Use CPU MP Init Common code	Barnali Sarkar
2017-06-14	soc/intel/skylake: Add missing PCH_DEV_* definitions	Furquan Shaikh
2017-06-09	soc/intel/skylake: Enable ACPI PM timer emulation on all CPUs	Subrata Banik
2017-06-09	soc/intel/skylake: Use CPU common library code	Barnali Sarkar
2017-06-09	soc/intel/skylake: Use common systemagent code	Subrata Banik
2017-06-07	src: change coreboot to lowercase	Martin Roth
2017-06-06	soc/intel/skylake: Use PCI IDs from device/pci_ids.h	Subrata Banik
2017-06-05	soc/intel/skylake: Add config for cpu base clock frequency	Aamir Bohra
2017-06-03	soc/intel/skylake: Add macro for setting GPIO interrupt trigger mode.	Kane Chen
2017-05-27	soc/intel/skylake: Add missing PCH_DEV_PCIE* definitions	Furquan Shaikh
2017-05-22	soc/intel/skylake: Display FPF status of CSME	Pratik Prajapati
2017-05-18	intel/common/block/i2c: Add common block for I2C and use the same in SoCs	Rizwan Qureshi
2017-05-09	soc/intel/skylake: Use intel/common/block/smbus code	Aamir Bohra
2017-05-08	soc/intel/skylake: remove unused SMI functions	Aaron Durbin
2017-05-02	soc/intel/skylake: Clean up code by using common FAST_SPI module	Barnali Sarkar
2017-05-02	soc/intel/skylake: Set xtal bypass on low power idle	Naresh G Solanki
2017-05-01	soc/intel/skylake: Add ID for Fizz i7	Shelley Chen
2017-04-28	soc/intel/skylake: Use ITSS common code	Bora Guvendik
2017-04-25	soc/intel/skylake: use postcar stage for fsp 2.0	Aaron Durbin
2017-04-24	soc/intel/skylake: Add ID's for Kabylake-R	Naresh G Solanki
2017-04-11	soc/intel/skylake: Use LPSS common library	Aamir Bohra
2017-04-10	soc/intel/skylake: Use common PCR module	Subrata Banik
2017-04-06	soc/intel/skylake: Add support for GSPI controller	Furquan Shaikh
2017-03-28	soc/intel/skylake: Clean up code by using common System Agent module	Subrata Banik
2017-03-28	soc/pci_devs.h: Use consistent naming in soc/pci_devs.h	Subrata Banik
2017-03-28	soc/intel/common/block: Add cache as ram init and teardown code	Subrata Banik
2017-03-23	soc/intel/skylake: Add SGX initialization	Robbie Zhang
2017-03-17	soc/intel/skylake: Fix remaining issues detected by checkpatch	Lee Leahy
2017-03-17	soc/intel/skylake: Add int to unsigned	Lee Leahy
2017-03-15	intel/skylake: Support for setting AC/DC loadline	Duncan Laurie
2017-03-15	intel/skylake: Fix bug in VR configuration with FSP 2.0	Duncan Laurie
2017-03-15	intel/skylake: nhlt: Add support for rt5514 NHLT blob	Duncan Laurie
2017-03-09	soc/intel/skylake: Add GPIO macros for IOxAPIC and SCI	Li Cheng Sooi
2017-03-09	soc/intel/skylake: Add SKL SOC PCH H GPIO support	Li Cheng Sooi
2017-03-08	intel/skylake: Add function to read state of Deep S5	Duncan Laurie
2017-03-06	soc/intel/skylake: Clean up CPU code	Subrata Banik
2017-03-06	soc/intel/skylake: Clean up XHCI code	Subrata Banik
2017-02-22	soc/intel/skylake: Fix broken suspend-resume	Furquan Shaikh
2017-02-20	soc/intel/skylake: Expand USB OC pins definition to support PCH-H	Teo Boon Tiong