coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-02-16	soc/intel/skylake: Add support for SPI device	Furquan Shaikh
2017-02-16	soc/intel/skylake: Add CPU, PCH, MCH, IGD, XHCI and UART IDs for SKL/KBL HALO...	Sooi, Li Cheng
2017-02-14	soc/intel/skylake: Perform CPU MP Init before FSP-S Init	Subrata Banik
2016-12-23	soc/intel/skylake: Use the new SPI driver interface	Furquan Shaikh
2016-12-13	intel MMA: Enable MMA with FSP2.0	Pratik Prajapati
2016-11-30	soc/skylake: Move IO decode range out from pch_lpc_init	Teo Boon Tiong
2016-11-30	soc/intel/skylake: Remove pad configuration size hardcoding	Subrata Banik
2016-11-28	soc/intel/skylake: Add USB Port Over Current (OC) Pin programming	Subrata Banik
2016-11-22	spi: Clean up SPI flash driver interface	Furquan Shaikh
2016-11-07	soc/intel/skylake: Add device id for PCH-Y	Naresh G Solanki
2016-10-28	skylake: Add GPIO macro for configuring inverted APIC input	Duncan Laurie
2016-10-27	soc/intel/skylake: make inline function static	Naresh G Solanki
2016-10-27	skylake: Add support for eSPI SMI events	Duncan Laurie
2016-10-27	skylake: Prepare GPE for use in bootblock	Duncan Laurie
2016-10-26	intel/skylake: Add support to enable wake-on-usb attach/detach	Furquan Shaikh
2016-10-26	soc/intel/skylake: Use intel common support to write-protect SPI flash	Furquan Shaikh
2016-10-16	soc/intel/skylake: Implement Global Reset MEI message	Subrata Banik
2016-10-16	soc/intel/skylake: Enable HECI BAR for ME communication	Subrata Banik
2016-09-19	soc/intel/skylake: Add FSP 2.0 support in ramstage	Naresh G Solanki
2016-09-15	soc/intel/skylake: Add FSP 2.0 support in romstage	Barnali Sarkar
2016-08-31	skylake: Add initial FSP2.0 support	Rizwan Qureshi
2016-08-18	soc/intel/skylake: Move bootblock specific code from skylake/romstage	Naresh G Solanki
2016-08-18	skylake: Do FspTempRamInit only for FSP1.1 & tidy up PCH early init	Rizwan Qureshi
2016-08-14	soc/intel/skylake: Change name pmc_tco_regs to smbus_tco_regs	Barnali Sarkar
2016-08-08	soc/intel/skylake: Cleanup patch for Skylake SoC	Barnali Sarkar
2016-08-06	soc/intel/skylake: Add Kabylake device Ids	Rizwan Qureshi
2016-07-31	Remove extra newlines from the end of all coreboot files.	Martin Roth
2016-07-30	chromeos mainboards: remove chromeos.asl	Aaron Durbin
2016-07-28	soc/intel/skylake: Add C entry bootblock support	Subrata Banik
2016-07-28	soc/intel/skylake: Do cache as ram and prepare for C entry	Subrata Banik
2016-07-15	soc/intel/skylake: use common Intel ACPI hardware definitions	Aaron Durbin
2016-06-29	soc/intel/skylake: refactor nhlt support	Aaron Durbin
2016-06-09	skylake: Support common LPSS I2C driver	Duncan Laurie
2016-06-09	skylake: gpio: Add support for setting 1.8V tolerant	Duncan Laurie
2016-06-09	skylake: Add function to set PRR for protecting flash	Duncan Laurie
2016-05-31	skylake: Cleanup formatting in pci_devs.h	Duncan Laurie
2016-05-31	skylake: Add Audio DSP device	Duncan Laurie
2016-05-21	skylake: Add ACPI device name handler	Duncan Laurie
2016-05-09	soc/intel/skylake: Output more ME status information	Duncan Laurie
2016-05-06	soc/intel/skylake: convert to using common MP and SMM init	Aaron Durbin
2016-03-12	soc/intel/skylake: add option to statically clock gate 8254 timer	Aaron Durbin
2016-03-08	skylake: Add and fill out CID1 NVS field	Duncan Laurie
2016-03-01	Skylake: Support Intel Speed Shift Technology based on config	Subrata Banik
2016-02-09	intel/skylake: Add gpio macro for unused GPIO pins	david
2016-02-04	intel/skylake: Display ME firmware status before os boot	Dhaval Sharma
2016-01-29	intel/skylake: Implement native Cache-as-RAM (CAR)	Subrata Banik
2016-01-28	drivers/intel/fsp1_1: Remove extra include references	Lee Leahy
2016-01-21	intel/skylake: remove third paragraph of license header	Martin Roth
2016-01-18	intel/skylake: provide default VR configuration	Aaron Durbin
2016-01-18	intel/skylake: Add elog event for THERMTRIP	Duncan Laurie