index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
skylake
/
romstage
/
car_stage_fsp20.S
Age
Commit message (
Expand
)
Author
2017-01-13
soc/intel/skylake: Rename car_stage.S for fsp2_0
Teo Boon Tiong