| Age | Commit message (Expand) | Author |
|---|
| 2020-12-25 | ACPI: Fix some GNVS field comments | Kyösti Mälkki |
| 2020-12-25 | sb,soc/intel: Fix GNVS OperationRegion | Kyösti Mälkki |
| 2020-12-25 | soc/intel/common/gfx: rename and guard graphics_soc_init() | Matt DeVillier |
| 2020-12-17 | soc/intel/skylake: Drop duplicate PmConfigPciClockRun configuration | Benjamin Doron |
| 2020-12-14 | soc/intel: Remove INTEL_CAR_NEM_ENHANCED_V2 config option | Shreesh Chhabbi |
| 2020-12-14 | soc/intel/skylake: Drop always-zero ProbelessTrace dt setting | Angel Pons |
| 2020-12-14 | soc/intel/skylake: Drop always-zero PowerLimit4 dt setting | Angel Pons |
| 2020-12-14 | soc/intel/skylake: Drop never-set DdrFreqLimit dt setting | Angel Pons |
| 2020-12-14 | soc/intel/skylake: Drop unreferenced PttSwitch dt setting | Angel Pons |
| 2020-12-14 | soc/intel/skylake: Drop unreferenced devicetree settings | Angel Pons |
| 2020-12-11 | soc/intel/common/block/lpc: Move southbridge_write_acpi_tables declaration | Marc Jones |
| 2020-12-10 | soc/intel/common: Adapt XHCI elog driver for reuse | Tim Wawrzynczak |
| 2020-12-09 | soc/intel/common/dmi: Move DMI defines into DMI driver header | Srinidhi N Kaushik |
| 2020-12-08 | soc/intel/skylake: Shorten SATA mode enum value names | Felix Singer |
| 2020-12-08 | soc/intel/skylake: Restore alphabetical order of Kconfig selects | Felix Singer |
| 2020-12-07 | soc/intel/skl: set PEG port state to auto | Michael Niewöhner |
| 2020-12-04 | soc/intel/{skl,cnl}: add NMI_{EN,STS} registers | Michael Niewöhner |
| 2020-12-04 | soc/intel/common/block/gpio: add code for NMI enabling | Michael Niewöhner |
| 2020-12-03 | soc/intel/skylake: Add chipset devicetree | Felix Singer |
| 2020-12-03 | src: Remove redundant use of ACPI offset(0) | Elyes HAOUAS |
| 2020-12-02 | soc/intel/skylake: Fix compilation under x86_64 | Patrick Rudolph |
| 2020-12-02 | soc/intel/skylake: Map VBIOS IDs | Paul Menzel |
| 2020-11-30 | soc/intel/skylake: Fix comment | Felix Singer |
| 2020-11-29 | soc/intel: Configure P2SB before other PCH controllers | Furquan Shaikh |
| 2020-11-28 | soc/intel/skl: correct OC pin skip value for disabled usb ports | Michael Niewöhner |
| 2020-11-24 | soc/intel/skylake: Support NHLT 1ch DMIC | Benjamin Doron |
| 2020-11-24 | soc/intel/skylake: Use correct NHLT_PDM_DEV definition | Benjamin Doron |
| 2020-11-22 | soc/intel/block/pmc: Only include the PCI driver when it is not hidden | Arthur Heymans |
| 2020-11-13 | soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig | Michael Niewöhner |
| 2020-11-13 | soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disabling | Michael Niewöhner |
| 2020-11-09 | soc/intel/skylake: Enable PCH thermal depending on devicetree | Benjamin Doron |
| 2020-11-04 | soc/intel/skl,acpi/acpigen: convert global CPPC package to local one | Michael Niewöhner |
| 2020-11-02 | soc/intel: Use of common reset code block | Subrata Banik |
| 2020-10-28 | soc/intel: deduplicate ACPI timer emulation | Michael Niewöhner |
| 2020-10-26 | mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable` | Michael Niewöhner |
| 2020-10-26 | soc/intel/skl: replace conditional on dt option reading CPUID for CPPC | Michael Niewöhner |
| 2020-10-26 | soc/intel: drop unneeded ISST configuration code | Michael Niewöhner |
| 2020-10-26 | src: Include <arch/io.h> when appropriate | Elyes HAOUAS |
| 2020-10-24 | {cpu,soc}/intel: deduplicate cpu code | Michael Niewöhner |
| 2020-10-21 | {cpu,soc}/intel: replace AES-NI locking by common implemenation call | Michael Niewöhner |
| 2020-10-21 | soc/intel,mb/*: get rid of legacy pad macros | Michael Niewöhner |
| 2020-10-21 | soc/intel: convert XTAL frequency constant to Kconfig | Michael Niewöhner |
| 2020-10-21 | soc/intel/common: add Kconfig for PM Timer emulation support | Michael Niewöhner |
| 2020-10-19 | soc/intel/*: drop useless XTAL shutdown qualification code | Michael Niewöhner |
| 2020-10-19 | soc/intel/skylake: Do not let FSP set the subsystem IDs | Benjamin Doron |
| 2020-10-17 | cpu/intel,soc/intel: drop Kconfig for hyperthreading | Michael Niewöhner |
| 2020-10-16 | soc/intel/skylake: Rename PcieRpAspm devicetree config | Benjamin Doron |
| 2020-10-15 | soc/intel/skylake: Configure L1 substates for PCH root ports | Benjamin Doron |
| 2020-10-14 | soc/intel/skylake/cpu.c: Fix comment coding style | Angel Pons |
| 2020-10-12 | soc/intel: Configure PAVP at compile-time | Benjamin Doron |
