index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
tigerlake
/
acpi
/
camera_clock_ctl.asl
Age
Commit message (
Expand
)
Author
2020-01-18
soc/intel/tigerlake: Update ACPI files
Ravi Sarawadi
