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path: root/src/soc/intel/tigerlake/fsp_params.c
AgeCommit message (Expand)Author
2020-05-28soc/intel/tigerlake: Configure THCWonkyu Kim
2020-05-26soc/intel/tigerlake: Disable VMDWonkyu Kim
2020-05-26soc/intel/tigerlake: Add FSP UPD D3HotEnable and D3ColdEnableJohn Zhao
2020-05-20tigerlake: enable DPTF functionality for volteerSumeet R Pawnikar
2020-05-20soc/tigerlake: Add devicetree configurability for IomTypeCPortPadCfgBrandon Breitenstein
2020-05-12soc/intel/tigerlake: Control SATA and DMI power optimizationShaunak Saha
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-01soc/intel/tigerlake: Fill PcieRpClkReqDetect from devicetreeMeera Ravindranath
2020-04-20soc/intel/tigerlake: Merge the recent change from other platformsWonkyu Kim
2020-04-14soc/intel/tigerlake: Implement CHIPSET_LOCKDOWNWonkyu Kim
2020-04-14soc/intel/tigerlake: Configure RP settingWonkyu Kim
2020-04-06soc/intel/tigerlake: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-01soc/intel/tigerlake: Remove Jasper Lake SoC referencesAamir Bohra
2020-01-13soc/intel/tigerlake: Select correct fsp_param as per SoC KconfigMaulik V Vaghela
2019-12-11soc/intel/tigerlake: Include soc common lpss header fileAamir Bohra
2019-11-09soc/intel/tigerlake: Do initial SoC commit till ramstageSubrata Banik