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path: root/src/soc/intel/tigerlake/meminit.c
AgeCommit message (Expand)Author
2021-01-25soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driverFurquan Shaikh
2020-10-19soc/intel/tigerlake: Reflow long linesSridhar Siricilla
2020-08-06soc/intel/tigerlake: add common routine for DDR initNick Vaccaro
2020-07-26src: Remove extra lines in license headerElyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-29soc/intel/tigerlake: Check SPD is not NULL before printEric Lai
2020-04-28soc/intel/tigerlake: fix call to print_spd_info()Nick Vaccaro
2020-04-25soc/intel/tigerlake: Fix FSP SPD index for DDR4Furquan Shaikh
2020-04-11soc/intel/tigerlake: Disable MrcSafeConfigSrinidhi N Kaushik
2020-04-10soc/intel/tigerlake: Add support to initialize DDR4 MemoryVarun Joshi
2020-04-05soc/intel/tigerlake: Replace Reserved9 usage with DisableDimmCh# UPD.Srinidhi N Kaushik
2020-04-02soc/intel/tigerlake: Reorganize memory initialization supportFurquan Shaikh
2020-04-01soc/intel/tigerlake: Remove Jasper Lake SoC referencesAamir Bohra